Re: [PATCH net-next v2 3/3] net: dsa: microchip: lan937x: disable VPHY support

[Vladimir Oltean]

On Mon, Jul 01, 2024 at 10:53:43AM +0200, Oleksij Rempel wrote:
> From: Lucas Stach <l.stach@xxxxxxxxxxxxxx>
> 
> As described by the microchip article "LAN937X - The required
> configuration for the external MAC port to operate at RGMII-to-RGMII
> 1Gbps link speed." [1]:
> 
> "When VPHY is enabled, the auto-negotiation process following IEEE 802.3
> standard will be triggered and will result in RGMII-to-RGMII signal
> failure on the interface because VPHY will try to poll the PHY status
> that is not available in the scenario of RGMII-to-RGMII connection
> (normally the link partner is usually an external processor).
> 
> Note that when VPHY fails on accessing PHY registers, it will fall back
> to 100Mbps speed, it indicates disabling VPHY is optional if you only
> need the port to link at 100Mbps speed.
> 
> Again, VPHY must and can only be disabled by writing VPHY_DISABLE bit in
> the register below as there is no strapping pin for the control."
> 
> This patch was tested on LAN9372, so far it seems to not to affect VPHY
> based clock crossing optimization for the ports with integrated PHYs.
> 
> [1]: https://microchip.my.site.com/s/article/LAN937X-The-required-configuration-for-the-external-MAC-port-to-operate-at-RGMII-to-RGMII-1Gbps-link-speed
> 
> Signed-off-by: Lucas Stach <l.stach@xxxxxxxxxxxxxx>
> Signed-off-by: Oleksij Rempel <o.rempel@xxxxxxxxxxxxxx>
> ---
> changes v2:
> - reword the comment and link microchip article
> ---

Reviewed-by: Vladimir Oltean <olteanv@xxxxxxxxx>