Re: [PATCH v2 4/8] arm64: dts: renesas: r9a09g057: Add RIIC0-RIIC8 nodes

[Lad, Prabhakar]

Hi Claudiu,

On Mon, Aug 19, 2024 at 9:13 AM claudiu beznea <claudiu.beznea@xxxxxxxxx> wrote:
>
> Hi, Prabhakar,
>
> On 11.08.2024 23:49, Prabhakar wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> >
> > Add RIIC0-RIIC8 nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> > ---
> > v1->v2
> > - New patch
> > ---
> >  arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 198 +++++++++++++++++++++
> >  1 file changed, 198 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> > index 3d6c3a604ec9..c9e1e21b820d 100644
> > --- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> > @@ -141,6 +141,28 @@ ostm1: timer@11801000 {
> >                       status = "disabled";
> >               };
> >
> > +             i2c8: i2c@11c01000 {
> > +                     #address-cells = <1>;
> > +                     #size-cells = <0>;
> > +                     compatible = "renesas,riic-r9a09g057";
> > +                     reg = <0 0x11c01000 0 0x400>;
>
> According to [1] compatible and reg props are preferred to be at the
> beginning of the node.
>
Thanks I'll update the nodes according to [1].

> [1]
> https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/Documentation/devicetree/bindings/dts-coding-style.rst#n112
>

Cheers,
Prabhakar

> > +                     interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
> > +                                  <GIC_SPI 523 IRQ_TYPE_EDGE_RISING>,
> > +                                  <GIC_SPI 522 IRQ_TYPE_EDGE_RISING>,
> > +                                  <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>,
> > +                                  <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>,
> > +                                  <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
> > +                                  <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>,
> > +                                  <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
> > +                     interrupt-names = "tei", "ri", "ti", "spi", "sti",
> > +                                       "naki", "ali", "tmoi";
> > +                     clocks = <&cpg CPG_MOD 147>;
> > +                     clock-frequency = <100000>;
> > +                     resets = <&cpg 160>;
> > +                     power-domains = <&cpg>;
> > +                     status = "disabled";
> > +             };
> > +
>
> [ ... ]