Re: [PATCH v6 00/17] coresight: Use per-sink trace ID maps for Perf sessions

From: Suzuki K Poulose
Date: Wed Sep 04 2024 - 10:51:54 EST


On 30/08/2024 09:37, James Clark wrote:


On 29/08/2024 4:31 pm, Arnaldo Carvalho de Melo wrote:
On Thu, Aug 29, 2024 at 10:05:02AM +0100, James Clark wrote:


On 22/08/2024 3:35 pm, Suzuki K Poulose wrote:
Hi Arnaldo,

On 26/07/2024 15:49, Arnaldo Carvalho de Melo wrote:
On Fri, Jul 26, 2024 at 03:38:13PM +0100, Suzuki K Poulose wrote:
On 26/07/2024 15:32, Arnaldo Carvalho de Melo wrote:
On Fri, Jul 26, 2024 at 03:26:04PM +0100, Suzuki K Poulose wrote:
On 26/07/2024 15:18, Arnaldo Carvalho de Melo wrote:
On Mon, Jul 22, 2024 at 11:11:42AM +0100, James Clark wrote:
This will allow sessions with more than CORESIGHT_TRACE_IDS_MAX ETMs
as long as there are fewer than that many ETMs
connected to each sink.

Hey, may I take the tools part, i.e. patches 0-7 and
someone on the ARM
kernel team pick the driver bits?

I plan to pick the kernel driver bits for v6.12

Perhaps it is better for me to wait for that?

Yes, please.

Please let me know when you do so so that I can merge the tooling bits.

I have now merged the driver changes to coresight/next, they will be
sent to Greg for v6.12. [0]

You may go ahead and merge the tool bits.

I'm taking this as an Acked-by: Suzuki, ok?




Suzuki is out of office at the moment and can't email but he said it was ok for the acked-by.

Thanks James for conveying the message.

For the record:

For patches 1-8:

Acked-by: Suzuki K Poulose <suzuki.poulose@xxxxxxx>