Re: [PATCH 8/8] PCI: qcom: Add support to PCIe slot power supplies

[Qiang Yu]

On 8/28/2024 12:58 AM, Manivannan Sadhasivam wrote:
> On Tue, Aug 27, 2024 at 02:44:09PM +0300, Dmitry Baryshkov wrote:
> > On Tue, 27 Aug 2024 at 09:36, Qiang Yu <quic_qianyu@xxxxxxxxxxx> wrote:
> > > On platform x1e80100 QCP, PCIe3 is a standard x8 form factor. Hence, add
> > > support to use 3.3v, 3.3v aux and 12v regulators.
> > First of all, I don't see corresponding bindings change.
> >
> > Second, these supplies power up the slot, not the host controller
> > itself. As such these supplies do not belong to the host controller
> > entry. Please consider using the pwrseq framework instead.
> Indeed. For legacy reasons, slot power supplies were populated in the host
> bridge node itself until recently Rob started objecting it [1]. And it makes
> real sense to put these supplies in the root port node and handle them in the
> relevant driver.
>
> I'm still evaluating whether the handling should be done in the portdrv or
> pwrctl driver, but haven't reached the conclusion. Pwrctl seems to be the ideal
> choice, but I see a few issues related to handling the OF node for the root
> port.
>
> Hope I'll come to a conclusion in the next few days and will update this thread.
>
> - Mani
>
> [1] https://lore.kernel.org/lkml/20240604235806.GA1903493-robh@xxxxxxxxxx/
Hi Mani, do you have any updates?

Thanks,
Qiang
> > > Signed-off-by: Qiang Yu <quic_qianyu@xxxxxxxxxxx>
> > > ---
> > >   drivers/pci/controller/dwc/pcie-qcom.c | 52 +++++++++++++++++++++++++-
> > >   1 file changed, 50 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> > > index 6f953e32d990..59fb415dfeeb 100644
> > > --- a/drivers/pci/controller/dwc/pcie-qcom.c
> > > +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> > > @@ -248,6 +248,8 @@ struct qcom_pcie_cfg {
> > >          bool no_l0s;
> > >   };
> > >
> > > +#define QCOM_PCIE_SLOT_MAX_SUPPLIES                    3
> > > +
> > >   struct qcom_pcie {
> > >          struct dw_pcie *pci;
> > >          void __iomem *parf;                     /* DT parf */
> > > @@ -260,6 +262,7 @@ struct qcom_pcie {
> > >          struct icc_path *icc_cpu;
> > >          const struct qcom_pcie_cfg *cfg;
> > >          struct dentry *debugfs;
> > > +       struct regulator_bulk_data slot_supplies[QCOM_PCIE_SLOT_MAX_SUPPLIES];
> > >          bool suspended;
> > >          bool use_pm_opp;
> > >   };
> > > @@ -1174,6 +1177,41 @@ static int qcom_pcie_link_up(struct dw_pcie *pci)
> > >          return !!(val & PCI_EXP_LNKSTA_DLLLA);
> > >   }
> > >
> > > +static int qcom_pcie_enable_slot_supplies(struct qcom_pcie *pcie)
> > > +{
> > > +       struct dw_pcie *pci = pcie->pci;
> > > +       int ret;
> > > +
> > > +       ret = regulator_bulk_enable(ARRAY_SIZE(pcie->slot_supplies),
> > > +                                   pcie->slot_supplies);
> > > +       if (ret < 0)
> > > +               dev_err(pci->dev, "Failed to enable slot regulators\n");
> > > +
> > > +       return ret;
> > > +}
> > > +
> > > +static void qcom_pcie_disable_slot_supplies(struct qcom_pcie *pcie)
> > > +{
> > > +       regulator_bulk_disable(ARRAY_SIZE(pcie->slot_supplies),
> > > +                              pcie->slot_supplies);
> > > +}
> > > +
> > > +static int qcom_pcie_get_slot_supplies(struct qcom_pcie *pcie)
> > > +{
> > > +       struct dw_pcie *pci = pcie->pci;
> > > +       int ret;
> > > +
> > > +       pcie->slot_supplies[0].supply = "vpcie12v";
> > > +       pcie->slot_supplies[1].supply = "vpcie3v3";
> > > +       pcie->slot_supplies[2].supply = "vpcie3v3aux";
> > > +       ret = devm_regulator_bulk_get(pci->dev, ARRAY_SIZE(pcie->slot_supplies),
> > > +                                     pcie->slot_supplies);
> > > +       if (ret < 0)
> > > +               dev_err(pci->dev, "Failed to get slot regulators\n");
> > > +
> > > +       return ret;
> > > +}
> > > +
> > >   static int qcom_pcie_host_init(struct dw_pcie_rp *pp)
> > >   {
> > >          struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
> > > @@ -1182,10 +1220,14 @@ static int qcom_pcie_host_init(struct dw_pcie_rp *pp)
> > >
> > >          qcom_ep_reset_assert(pcie);
> > >
> > > -       ret = pcie->cfg->ops->init(pcie);
> > > +       ret = qcom_pcie_enable_slot_supplies(pcie);
> > >          if (ret)
> > >                  return ret;
> > >
> > > +       ret = pcie->cfg->ops->init(pcie);
> > > +       if (ret)
> > > +               goto err_disable_slot;
> > > +
> > >          ret = phy_set_mode_ext(pcie->phy, PHY_MODE_PCIE, PHY_MODE_PCIE_RC);
> > >          if (ret)
> > >                  goto err_deinit;
> > > @@ -1216,7 +1258,8 @@ static int qcom_pcie_host_init(struct dw_pcie_rp *pp)
> > >          phy_power_off(pcie->phy);
> > >   err_deinit:
> > >          pcie->cfg->ops->deinit(pcie);
> > > -
> > > +err_disable_slot:
> > > +       qcom_pcie_disable_slot_supplies(pcie);
> > >          return ret;
> > >   }
> > >
> > > @@ -1228,6 +1271,7 @@ static void qcom_pcie_host_deinit(struct dw_pcie_rp *pp)
> > >          qcom_ep_reset_assert(pcie);
> > >          phy_power_off(pcie->phy);
> > >          pcie->cfg->ops->deinit(pcie);
> > > +       qcom_pcie_disable_slot_supplies(pcie);
> > >   }
> > >
> > >   static void qcom_pcie_host_post_init(struct dw_pcie_rp *pp)
> > > @@ -1602,6 +1646,10 @@ static int qcom_pcie_probe(struct platform_device *pdev)
> > >                          goto err_pm_runtime_put;
> > >          }
> > >
> > > +       ret = qcom_pcie_get_slot_supplies(pcie);
> > > +       if (ret)
> > > +               goto err_pm_runtime_put;
> > > +
> > >          ret = pcie->cfg->ops->get_resources(pcie);
> > >          if (ret)
> > >                  goto err_pm_runtime_put;
> > > --
> > > 2.34.1
> >
> > --
> > With best wishes
> > Dmitry