Re: [PATCH v3 1/5] iommu/amd: Disable AMD IOMMU if CMPXCHG16B feature is not supported

[Jason Gunthorpe]

On Mon, Sep 16, 2024 at 11:11:46PM +0700, Suthikulpanit, Suravee wrote:

> > Avoiding flushing is only possible if the full 256 bits are read
> > atomically.
> 
> I have verified with the hardware designer, and they have now confirmed that
> the IOMMU hardware has always been implemented with 256-bit read. The next
> revision of the IOMMU spec will be updated to correctly describe this part.
> Therefore, I will update the commit message and implement the code
> accordingly.

That is certainly convenient, except qemu doesn't follow that spec :\

Jason