Re: [PATCH v7 0/2] arm64: dts: qcom: extend the register range for ICE on sm8[56]50
From: Bartosz Golaszewski
Date: Fri Oct 04 2024 - 10:14:42 EST
On Fri, Oct 4, 2024 at 3:56 PM Bjorn Andersson
<quic_bjorande@xxxxxxxxxxx> wrote:
>
> On Tue, Oct 01, 2024 at 10:35:29AM +0200, Bartosz Golaszewski wrote:
> > The following changes extend the register range for ICE IPs on sm8550
> > and sm8650 in order to cover the registers used for wrapped key support
> > on these platforms.
> >
> > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@xxxxxxxxxx>
> >
> > Changes in v7:
> > - bring the ICE register range up to its full size of 0x18000
> > - Link to v6: https://lore.kernel.org/r/20240906-wrapped-keys-dts-v6-0-3f0287cf167e@xxxxxxxxxx
> >
> > Changes in v6:
> > - split out the DT changes into a separate series
>
> Bartosz, this strategy of "let's split things such that the maintainers
> can't see the full picture" is just BS. It needs to stop.
>
You're exaggerating, I'm not doing anything like this. You're still
Cc'ed on the single big series containing the code changes for wrapped
keys. The full picture is over there.
> Now you will argue that these patches stands on their own, and that
Yes, that's precisely what I'm going to say, because it's true.
0x18000 is the true register size (as per QCom docs) for ICE on
sm8[56]50 and sa8775p too and that alone warrants this change. If we
can get the DTS changes out of the way of wrapped keys, then that's
just a bonus.
> might be a valid case, but the argumentation you're making in the commit
> message clearly ties them to the code changes you're making somewhere
> else.
>
Are you referring to "(...) registers used for wrapped key support on
these platforms"? I could argue that it just says what the additional
registers are used for but I can drop the mention of this from the
message and just say "0x18000 is the true register range for ICE on
sm8650" if that works for you.
Bart