Re: [PATCH v2] arm64: dts: qcom: x1e80100: enable GICv3 ITS for PCIe

[Dmitry Baryshkov]

On Wed, Oct 09, 2024 at 06:17:15PM GMT, Johan Hovold wrote:
> The DWC PCIe controller can be used with its internal MSI controller or
> with an external one such as the GICv3 Interrupt Translation Service
> (ITS).
> 
> Add the msi-map properties needed to use the GIC ITS. This will also
> make Linux switch to the ITS implementation, which allows for assigning
> affinity to individual MSIs. This specifically allows NVMe and Wi-Fi
> interrupts to be processed on all cores (and not just on CPU0).
> 
> Note that using the GIC ITS on x1e80100 will cause Advanced Error
> Reporting (AER) interrupts to be received on errors unlike when using
> the internal MSI controller. Consequently, notifications about
> (correctable) errors may now be logged for errors that previously went
> unnoticed.
> 
> Also note that PCIe5 (and PCIe3) can currently only be used with the
> internal MSI controller due to a platform (firmware) limitation.
> 
> Signed-off-by: Johan Hovold <johan+linaro@xxxxxxxxxx>
> ---
> 
> The PCIe Gen4 stability fixes [1] are now in 6.12-rc1 so that we can enable
> the GIC ITS without being flooded with link error notifications [2].

Cc: <stable+noautosel@xxxxxxxxxx> # Depends on driver stability fixes
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>

> Johan
> 
> [1] https://lore.kernel.org/lkml/20240911-pci-qcom-gen4-stability-v7-0-743f5c1fd027@xxxxxxxxxx/
> [2] https://lore.kernel.org/lkml/ZpDnSL8as7km9_0b@xxxxxxxxxxxxxxxxxxxx/
> 
> Changes in v2
>  - amend commit message with comment about PCIe3 and PCIe5 only
>    supporting the internal MSI controller
> 
> 

-- 
With best wishes
Dmitry