[PATCH v4 8/9] arm64: dts: renesas: r9a09g057: Add `renesas,syscon-cpg-error-rst` property to WDT node
From: Prabhakar
Date: Mon Feb 10 2025 - 13:51:29 EST
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
Add `renesas,syscon-cpg-error-rst` property to WDT node, to
determine whether the current boot resulted from a `Power-on Reset`
or a `Watchdog Reset`.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
---
v2->v3
- No change
v1->v2
- No change
---
arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
index acc9c512fbab..4d5baed02fda 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
@@ -367,6 +367,7 @@ wdt0: watchdog@11c00400 {
clock-names = "pclk", "oscclk";
resets = <&cpg 0x75>;
power-domains = <&cpg>;
+ renesas,syscon-cpg-error-rst = <&cpg 0xb40 0>;
status = "disabled";
};
@@ -377,6 +378,7 @@ wdt1: watchdog@14400000 {
clock-names = "pclk", "oscclk";
resets = <&cpg 0x76>;
power-domains = <&cpg>;
+ renesas,syscon-cpg-error-rst = <&cpg 0xb40 1>;
status = "disabled";
};
@@ -387,6 +389,7 @@ wdt2: watchdog@13000000 {
clock-names = "pclk", "oscclk";
resets = <&cpg 0x77>;
power-domains = <&cpg>;
+ renesas,syscon-cpg-error-rst = <&cpg 0xb40 2>;
status = "disabled";
};
@@ -397,6 +400,7 @@ wdt3: watchdog@13000400 {
clock-names = "pclk", "oscclk";
resets = <&cpg 0x78>;
power-domains = <&cpg>;
+ renesas,syscon-cpg-error-rst = <&cpg 0xb40 3>;
status = "disabled";
};
--
2.43.0