Re: [PATCH] Alpha: Emulate unaligned LDx_L/STx_C for data consistency

From: Linus Torvalds
Date: Thu Feb 20 2025 - 13:00:14 EST


On Thu, 20 Feb 2025 at 09:54, Richard Henderson
<richard.henderson@xxxxxxxxxx> wrote:
>
> Crucially, when emulating non-aligned, you should not strive to make it atomic. No other
> architecture promises atomic non-aligned stores, so why should you do that here?

I'm not disagreeing with the "it doesn't necessarily have to be
atomic", but I will point out that x86 does indeed promise atomic
non-aligned accesses.

It will actually lock both cachelines when straddling a cacheline.

It's slow, it's horrendous, and people are trying to get away from it
(google "split lock"), but it is actually architecturally supported.

Linus