Re: [PATCH] Alpha: Emulate unaligned LDx_L/STx_C for data consistency

[Richard Henderson]

On 2/20/25 09:59, Linus Torvalds wrote:
> On Thu, 20 Feb 2025 at 09:54, Richard Henderson
> <richard.henderson@xxxxxxxxxx> wrote:
> > Crucially, when emulating non-aligned, you should not strive to make it atomic.  No other
> > architecture promises atomic non-aligned stores, so why should you do that here?
>
> I'm not disagreeing with the "it doesn't necessarily have to be
> atomic", but I will point out that x86 does indeed promise atomic
> non-aligned accesses.

I should have been more expansive with that statement: I didn't mean "no unaligned 
atomics" (e.g. lock orw), but "unaligned normal stores may be non-atomic" (e.g. movw 
across a cacheline).

My guess about the gcc patches is that it's the latter that wanted emulation here.


r~