Re: [PATCH 04/13] dt-bindings: soc: airoha: add Documentation for Airoha AN7581 SCU SSR

From: Christian Marangi
Date: Mon Mar 10 2025 - 06:33:59 EST


On Mon, Mar 10, 2025 at 09:00:40AM +0100, Krzysztof Kozlowski wrote:
> On Sun, Mar 09, 2025 at 02:29:35PM +0100, Christian Marangi wrote:
> > The Airoha AN7581 SoC have in the SCU register space particular
> > address that control how some peripheral are configured.
> >
> > These are toggeled in the System Status Register and are used to
> > toggle Serdes port for USB 3.0 mode or HSGMII, USB 3.0 mode or PCIe2
> > or setup port for PCIe mode or Ethrnet mode (HSGMII/USXGMII).
> >
> > Modes are mutually exclusive and selecting one mode cause the
> > other feature to not work (example a mode in USB 3.0 cause PCIe
> > port 2 to not work) This depends also on what is physically
> > connected to the Hardware and needs to correctly reflect the
> > System Status Register bits.
> >
> > Special care is needed for PCIe port 0 in 2 line mode that
> > requires both WiFi1 and WiFi2 Serdes port set to PCIe0 2 Line
> > mode.
> >
> > Signed-off-by: Christian Marangi <ansuelsmth@xxxxxxxxx>
> > ---
> > .../soc/airoha/airoha,an7581-scu-ssr.yaml | 106 ++++++++++++++++++
> > MAINTAINERS | 1 +
> > 2 files changed, 107 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/soc/airoha/airoha,an7581-scu-ssr.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/soc/airoha/airoha,an7581-scu-ssr.yaml b/Documentation/devicetree/bindings/soc/airoha/airoha,an7581-scu-ssr.yaml
> > new file mode 100644
> > index 000000000000..4bbf6e3b79a4
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/soc/airoha/airoha,an7581-scu-ssr.yaml
> > @@ -0,0 +1,106 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/soc/airoha/airoha,an7581-scu-ssr.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Airoha AN7581 SCU System Status Register
> > +
> > +maintainers:
> > + - Christian Marangi <ansuelsmth@xxxxxxxxx>
> > +
> > +description: >
> > + The Airoha AN7581 SoC have in the SCU register space particular
> > + address that control how some peripheral are configured.
> > +
> > + These are toggeled in the System Status Register and are used to
> > + toggle Serdes port for USB 3.0 mode or HSGMII, USB 3.0 mode or PCIe2
> > + or setup port for PCIe mode or Ethrnet mode (HSGMII/USXGMII).
>
> typo, Ethernet
>
> > +
> > + Modes are mutually exclusive and selecting one mode cause the
> > + other feature to not work (example a mode in USB 3.0 cause PCIe
> > + port 2 to not work) This depends also on what is physically
> > + connected to the Hardware and needs to correctly reflect the
> > + System Status Register bits.
> > +
> > + Special care is needed for PCIe port 0 in 2 line mode that
> > + requires both WiFi1 and WiFi2 Serdes port set to PCIe0 2 Line
> > + mode.
> > +
> > +properties:
> > + compatible:
> > + const: airoha,an7581-scu-ssr
>
> That's not a separate device, but part of the SCU.
>

More comments on this in the MFD patch.

> But more important - such definition of choice of serial engines is
> really not flexible, not reabable and not helping integrating into DTS.
> Are you going to grow this for next chip airoha,serdes-wifi20, then
> airoha,serdes-wifi21, 22... ? And then how the if:then: would look like?
>
> Assuming you do not have here child-parent relationship, like usually
> for serial engines, so then this should be somehow list of devices
> (strings) you want to run.
>

You are right, string is more flexible and I don't need the include
file.

--
Ansuel