[PATCH v4 09/11] ARM: dts: microchip: sama7d65: Add SRAM and DRAM components support

From: Ryan.Wanner
Date: Wed Mar 26 2025 - 11:41:29 EST


From: Ryan Wanner <Ryan.Wanner@xxxxxxxxxxxxx>

Add SRAM, secumod, UDDRC, and DDR3phy to enable support for low power modes.

Signed-off-by: Ryan Wanner <Ryan.Wanner@xxxxxxxxxxxxx>
---
arch/arm/boot/dts/microchip/sama7d65.dtsi | 35 +++++++++++++++++++++++
1 file changed, 35 insertions(+)

diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi
index b6710ccd4c36..7d71e7326e3a 100644
--- a/arch/arm/boot/dts/microchip/sama7d65.dtsi
+++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi
@@ -47,6 +47,14 @@ slow_xtal: clock-slowxtal {
};
};

+ ns_sram: sram@100000 {
+ compatible = "mmio-sram";
+ reg = <0x100000 0x20000>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
+
soc {
compatible = "simple-bus";
ranges;
@@ -58,6 +66,23 @@ sfrbu: sfr@e0008000 {
reg = <0xe0008000 0x20>;
};

+ securam: sram@e0000800 {
+ compatible = "microchip,sama7d65-securam", "atmel,sama5d2-securam", "mmio-sram";
+ reg = <0xe0000800 0x4000>;
+ ranges = <0 0xe0000800 0x4000>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 17>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ no-memory-wc;
+ };
+
+ secumod: secumod@e0004000 {
+ compatible = "microchip,sama7d65-secumod", "atmel,sama5d2-secumod", "syscon";
+ reg = <0xe0004000 0x4000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
pioa: pinctrl@e0014000 {
compatible = "microchip,sama7d65-pinctrl", "microchip,sama7g5-pinctrl";
reg = <0xe0014000 0x800>;
@@ -227,6 +252,16 @@ i2c10: i2c@600 {
};
};

+ uddrc: uddrc@e3800000 {
+ compatible = "microchip,sama7d65-uddrc", "microchip,sama7g5-uddrc";
+ reg = <0xe3800000 0x4000>;
+ };
+
+ ddr3phy: ddr3phy@e3804000 {
+ compatible = "microchip,sama7d65-ddr3phy", "microchip,sama7g5-ddr3phy";
+ reg = <0xe3804000 0x1000>;
+ };
+
gic: interrupt-controller@e8c11000 {
compatible = "arm,cortex-a7-gic";
reg = <0xe8c11000 0x1000>,
--
2.43.0