Re: [RFC PATCH 1/4] dt-bindings: pinctrl: Add eswin,eic7700-pinctrl binding

From: Krzysztof Kozlowski
Date: Sat Mar 29 2025 - 00:43:15 EST


On 26/03/2025 10:57, Emil Renner Berthing wrote:

Please kindly trim the replies from unnecessary context. It makes it
much easier to find new content.


>>
>>> + type: object
>>> + additionalProperties: false
>>> +
>>> + patternProperties:
>>> + '-pins$':
>>> + type: object
>>> + allOf:
>>> + - $ref: /schemas/pinctrl/pincfg-node.yaml#
>>> + - $ref: /schemas/pinctrl/pinmux-node.yaml#
>>> +
>>> + additionalProperties: false
>>> +
>>> + description:
>>> + A pinctrl node should contain at least one subnode describing one
>>> + or more pads and their associated pinmux and pinconf settings.
>>> +
>>> + properties:
>>> + pins:
>>> + items:
>>> + enum: [ CHIP_MODE, MODE_SET0, MODE_SET1, MODE_SET2, MODE_SET3,
>>> + XIN, RTC_XIN, RST_OUT_N, KEY_RESET_N, GPIO0, POR_SEL,
>>> + JTAG0_TCK, JTAG0_TMS, JTAG0_TDI, JTAG0_TDO, GPIO5, SPI2_CS0_N,
>>> + JTAG1_TCK, JTAG1_TMS, JTAG1_TDI, JTAG1_TDO, GPIO11, SPI2_CS1_N,
>>> + PCIE_CLKREQ_N, PCIE_WAKE_N, PCIE_PERST_N, HDMI_SCL, HDMI_SDA,
>>> + HDMI_CEC, JTAG2_TRST, RGMII0_CLK_125, RGMII0_TXEN,
>>> + RGMII0_TXCLK, RGMII0_TXD0, RGMII0_TXD1, RGMII0_TXD2,
>>> + RGMII0_TXD3, I2S0_BCLK, I2S0_WCLK, I2S0_SDI, I2S0_SDO,
>>> + I2S_MCLK, RGMII0_RXCLK, RGMII0_RXDV, RGMII0_RXD0, RGMII0_RXD1,
>>> + RGMII0_RXD2, RGMII0_RXD3, I2S2_BCLK, I2S2_WCLK, I2S2_SDI,
>>> + I2S2_SDO, GPIO27, GPIO28, GPIO29, RGMII0_MDC, RGMII0_MDIO,
>>> + RGMII0_INTB, RGMII1_CLK_125, RGMII1_TXEN, RGMII1_TXCLK,
>>> + RGMII1_TXD0, RGMII1_TXD1, RGMII1_TXD2, RGMII1_TXD3, I2S1_BCLK,
>>> + I2S1_WCLK, I2S1_SDI, I2S1_SDO, GPIO34, RGMII1_RXCLK,
>>> + RGMII2_RXDV, RGMII2_RXD0, RGMII2_RXD1, RGMII2_RXD2,
>>> + RGMII2_RXD3, SPI1_CS0_N, SPI1_CLK, SPI1_D0, SPI1_D1, SPI1_D2,
>>> + SPI1_D3, SPI1_CS1_N, RGMII1_MDC, RGMII1_MDIO, RGMII1_INTB,
>>> + USB0_PWREN, USB1_PWREN, I2C0_SCL, I2C0_SDA, I2C1_SCL, I2C1_SDA,
>>> + I2C2_SCL, I2C2_SDA, I2C3_SCL, I2C3_SDA, I2C4_SCL, I2C4_SDA,
>>> + I2C5_SCL, I2C5_SDA, UART0_TX, UART0_RX, UART1_TX, UART1_RX,
>>> + UART1_CTS, UART1_RTS, UART2_TX, UART2_RX, JTAG2_TCK, JTAG2_TMS,
>>> + JTAG2_TDI, JTAG2_TDO, FAN_PWM, FAN_TACH, MIPI_CSI0_XVS,
>>> + MIPI_CSI0_XHS, MIPI_CSI0_MCLK, MIPI_CSI1_XVS, MIPI_CSI1_XHS,
>>> + MIPI_CSI1_MCLK, MIPI_CSI2_XVS, MIPI_CSI2_XHS, MIPI_CSI2_MCLK,
>>> + MIPI_CSI3_XVS, MIPI_CSI3_XHS, MIPI_CSI3_MCLK, MIPI_CSI4_XVS,
>>> + MIPI_CSI4_XHS, MIPI_CSI4_MCLK, MIPI_CSI5_XVS, MIPI_CSI5_XHS,
>>> + MIPI_CSI5_MCLK, SPI3_CS_N, SPI3_CLK, SPI3_DI, SPI3_DO, GPIO92,
>>> + GPIO93, S_MODE, GPIO95, SPI0_CS_N, SPI0_CLK, SPI0_D0, SPI0_D1,
>>> + SPI0_D2, SPI0_D3, I2C10_SCL, I2C10_SDA, I2C11_SCL, I2C11_SDA,
>>> + GPIO106, BOOT_SEL0, BOOT_SEL1, BOOT_SEL2, BOOT_SEL3, GPIO111,
>>> + LPDDR_REF_CLK ]
>>
>> All these should be lowercase.
>
> Plenty of pinctrl drivers use uppercase names for the pins, intel, amd,
> mediatek to name a few, and this is also what the EIC7700 documentation uses.
> Do you still wan't Linux to call the pins something else?

I am not asking you to use different names than in datasheet. Names will
be exactly the same and the case does not matter for humans/grepping
with datasheet. I don't get why using poor examples is the way to argue.
It's like someone wrote bug, so I can as well...

Well fine.

Best regards,
Krzysztof