[PATCH 3/3] dt-bindings: clock: add TI CDCE6214 binding

From: Sascha Hauer
Date: Tue Apr 08 2025 - 08:13:20 EST


The CDCE6214 is a Ultra-Low Power Clock Generator With One PLL, Four
Differential Outputs, Two Inputs, and Internal EEPROM. This patch adds
the device tree binding for this chip.

Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
---
.../devicetree/bindings/clock/ti,cdce6214.yaml | 157 +++++++++++++++++++++
1 file changed, 157 insertions(+)

diff --git a/Documentation/devicetree/bindings/clock/ti,cdce6214.yaml b/Documentation/devicetree/bindings/clock/ti,cdce6214.yaml
new file mode 100644
index 0000000000000..63e6c9d9b1771
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/ti,cdce6214.yaml
@@ -0,0 +1,157 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/ti,cdce6214.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: TI CDCE6214 programmable clock generator with PLL
+
+maintainers:
+ - Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
+
+description: |
+ Ultra-Low Power Clock Generator With One PLL, Four Differential Outputs,
+ Two Inputs, and Internal EEPROM
+
+ - CDCE6214: https://www.ti.com/product/CDCE6214
+
+properties:
+ compatible:
+ enum:
+ - ti,cdce6214
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ minItems: 1
+ maxItems: 2
+
+ clock-names:
+ minItems: 1
+ items:
+ - const: priref
+ - const: secref
+
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 0
+
+ "#clock-cells":
+ const: 1
+
+patternProperties:
+ "^clk@[0-1]$":
+ type: object
+ description: |
+ optional child node that can be used to specify input pin parameters. The reg
+ properties match the CDCE6214_CLK_* defines.
+
+ additionalProperties: false
+
+ properties:
+ reg:
+ description:
+ clock input identifier.
+ minimum: 0
+ maximum: 1
+
+ ti,ref-xtal:
+ type: boolean
+ description: |
+ If true use input as XTAL input
+
+ ti,ref-lvcmos:
+ type: boolean
+ description: |
+ If true use input as LVCMOS input
+
+ ti,ref-diff:
+ type: boolean
+ description: |
+ If true use input as differential input
+
+ "^clk@[2-9]$":
+ type: object
+ description: |
+ optional child node that can be used to specify output pin parameters. The reg
+ properties match the CDCE6214_CLK_* defines.
+
+ additionalProperties: false
+
+ properties:
+ reg:
+ description:
+ clock output identifier.
+ minimum: 2
+ maximum: 9
+
+ ti,lphcsl:
+ type: boolean
+ description: |
+ If true enable LP-HCSL output mode for this clock
+
+ ti,lvds:
+ type: boolean
+ description: |
+ If true enable LVDS output mode for this clock
+
+ ti,cmosp:
+ type: boolean
+ description: |
+ If true enable CMOSP output for this clock
+
+ ti,cmosn:
+ type: boolean
+ description: |
+ If true enable CMOSN output for this clock
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - "#clock-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/ti,cdce6214.h>
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ clock-generator@67 {
+ compatible = "ti,cdce6214";
+ reg = <0x67>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #clock-cells = <1>;
+ clocks = <&clock_ref25m>;
+ clock-names = "priref";
+
+ clk@CDCE6214_CLK_SECREF {
+ reg = <CDCE6214_CLK_SECREF>;
+ ti,ref-xtal;
+ };
+
+ clk@CDCE6214_CLK_OUT1 {
+ reg = <CDCE6214_CLK_OUT1>;
+ ti,cmosp;
+ ti,cmosn;
+ };
+
+ clk@CDCE6214_CLK_OUT2 {
+ reg = <CDCE6214_CLK_OUT2>;
+ ti,lvds;
+ };
+
+ clk@CDCE6214_CLK_OUT4 {
+ reg = <CDCE6214_CLK_OUT4>;
+ ti,cmosp;
+ ti,cmosn;
+ };
+ };
+ };

--
2.39.5