Re: [PATCH net-next v5 12/12] net: dsa: add driver for MaxLinear GSW1xx switch family

[Sverdlin, Alexander]

Hi Daniel,

On Thu, 2025-10-30 at 11:30 +0000, Daniel Golle wrote:
> Add driver for the MaxLinear GSW1xx family of Ethernet switch ICs which
> are based on the same IP as the Lantiq/Intel GSWIP found in the Lantiq VR9
> and Intel GRX MIPS router SoCs. The main difference is that instead of
> using memory-mapped I/O to communicate with the host CPU these ICs are
> connected via MDIO (or SPI, which isn't supported by this driver).
> Implement the regmap API to access the switch registers over MDIO to allow
> reusing lantiq_gswip_common for all core functionality.
> 
> The GSW1xx also comes with a SerDes port capable of 1000Base-X, SGMII and
> 2500Base-X, which can either be used to connect an external PHY or SFP
> cage, or as the CPU port. Support for the SerDes interface is implemented
> in this driver using the phylink_pcs interface.
> 
> Signed-off-by: Daniel Golle <daniel@xxxxxxxxxxxxxx>
> ---
> v4:
>  * break out PCS reset into dedicated function
>  * drop hacky support for reverse-SGMII
>  * remove again the custom properties for TX and RX inverted SerDes
>    PCS in favor of waiting for generic properties to land
> 
> v3:
>  * avoid disrupting link when calling .pcs_config()
>  * sort functions and phylink_pcs_ops instance in same order as
>    struct definition
>  * always set bootstrap override bits and add explanatory comment
>  * move definitions to separate header file
>  * add custom properties for TX and RX inverted data on the SerDes
>    interface
> 
> v2: remove left-overs of 4k VLAN support (will be added in future)
> 
>  drivers/net/dsa/lantiq/Kconfig          |  12 +
>  drivers/net/dsa/lantiq/Makefile         |   1 +
>  drivers/net/dsa/lantiq/lantiq_gswip.h   |   1 +
>  drivers/net/dsa/lantiq/mxl-gsw1xx.c     | 733 ++++++++++++++++++++++++
>  drivers/net/dsa/lantiq/mxl-gsw1xx.h     | 126 ++++
>  drivers/net/dsa/lantiq/mxl-gsw1xx_pce.h | 154 +++++
>  6 files changed, 1027 insertions(+)
>  create mode 100644 drivers/net/dsa/lantiq/mxl-gsw1xx.c
>  create mode 100644 drivers/net/dsa/lantiq/mxl-gsw1xx.h
>  create mode 100644 drivers/net/dsa/lantiq/mxl-gsw1xx_pce.h

thank you for the patch!

For some reason with both v4 and v5 I can reliably reproduce the following
warning (ASSERT_RTNL()) at the very beginning of
drivers/net/dsa/local_termination.sh selftest:

RTNL: assertion failed at git/net/core/dev.c (9480)
WARNING: CPU: 1 PID: 529 at git/net/core/dev.c:9480 __dev_set_promiscuity+0x174/0x188
CPU: 1 UID: 996 PID: 529 Comm: systemd-resolve Tainted: G           O        6.18.0-rc2+gite9079300094d #1 PREEMPT 
pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
pc : __dev_set_promiscuity+0x174/0x188
lr : __dev_set_promiscuity+0x174/0x188
Call trace:
 __dev_set_promiscuity+0x174/0x188 (P)
 __dev_set_rx_mode+0xa0/0xb0
 dev_mc_del+0x94/0xc0
 igmp6_group_dropped+0x124/0x410
 __ipv6_dev_mc_dec+0x108/0x168
 __ipv6_sock_mc_drop+0x64/0x188
 ipv6_sock_mc_drop+0x140/0x170
 do_ipv6_setsockopt+0x1408/0x1828
 ipv6_setsockopt+0x64/0xf8
 udpv6_setsockopt+0x28/0x58
 sock_common_setsockopt+0x24/0x38
 do_sock_setsockopt+0x78/0x158
 __sys_setsockopt+0x88/0x110
 __arm64_sys_setsockopt+0x30/0x48
 invoke_syscall+0x50/0x120
 el0_svc_common.constprop.0+0xc8/0xf0
 do_el0_svc+0x24/0x38
 el0_svc+0x50/0x2b0
 el0t_64_sync_handler+0xa0/0xe8
 el0t_64_sync+0x198/0x1a0

(testing with GSW145)
I'm not sure though, if it's related to the gsw1xx code, am65-cpsw-nuss driver
on my CPU port or if it's a fresh regression in net-next...

I can see the above splat if I apply the patchset onto bfe62db5422b1a5f25752bd0877a097d436d876d
but not with older patchset on top of e90576829ce47a46838685153494bc12cd1bc333.

I'll try to bisect the underlying net-next...

-- 
Alexander Sverdlin
Siemens AG
www.siemens.com