Re: Re: [PATCH 1/3] riscv: soc: re-organized allwinner menu

[revy]

> -----Original Messages-----
> From: "Krzysztof Kozlowski" <krzk@xxxxxxxxxx>
> Sent Time: 2025-11-08 19:29:07 (Saturday)
> To: gaohan@xxxxxxxxxxx, "Paul Walmsley" <pjw@xxxxxxxxxx>, "Palmer Dabbelt" <palmer@xxxxxxxxxxx>, "Albert Ou" <aou@xxxxxxxxxxxxxxxxx>, "Alexandre Ghiti" <alex@xxxxxxxx>, "Rob Herring" <robh@xxxxxxxxxx>, "Krzysztof Kozlowski" <krzk+dt@xxxxxxxxxx>, "Conor Dooley" <conor+dt@xxxxxxxxxx>, "Chen-Yu Tsai" <wens@xxxxxxxx>, "Jernej Skrabec" <jernej.skrabec@xxxxxxxxx>, "Samuel Holland" <samuel@xxxxxxxxxxxx>, "Yixun Lan" <dlan@xxxxxxxxxx>, "Drew Fustini" <fustini@xxxxxxxxxx>, "Geert Uytterhoeven" <geert+renesas@xxxxxxxxx>, "Guodong Xu" <guodong@xxxxxxxxxxxx>, "Haylen Chu" <heylenay@xxxxxxx>, "Joel Stanley" <joel@xxxxxxxxx>
> Cc: linux-riscv@xxxxxxxxxxxxxxxxxxx, linux-kernel@xxxxxxxxxxxxxxx, devicetree@xxxxxxxxxxxxxxx, linux-arm-kernel@xxxxxxxxxxxxxxxxxxx, linux-sunxi@xxxxxxxxxxxxxxx, "Han Gao" <rabenda.cn@xxxxxxxxx>
> Subject: Re: [PATCH 1/3] riscv: soc: re-organized allwinner menu
> 
> On 08/11/2025 09:20, gaohan@xxxxxxxxxxx wrote:
>> From: Han Gao <gaohan@xxxxxxxxxxx>
>> 
>> Allwinner currently offers d1(s)/v821/v861/v881 on RISC-V,
>> using different IPs.
>> 
>> d1(s): Xuantie C906
>> v821: Andes A27 + XuanTie E907
>> v861/v881: XuanTie C907
>> 
>> Signed-off-by: Han Gao <gaohan@xxxxxxxxxxx>
>> ---
>> arch/riscv/Kconfig.socs | 22 +++++++++++++++++-----
>> 1 file changed, 17 insertions(+), 5 deletions(-)
>> 
>> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
>> index 848e7149e443..7cba5d6ec4c3 100644
>> --- a/arch/riscv/Kconfig.socs
>> +++ b/arch/riscv/Kconfig.socs
>> @@ -54,14 +54,26 @@ config SOC_STARFIVE
>> 	help
>> 	  This enables support for StarFive SoC platform hardware.
>> 
>> -config ARCH_SUNXI
>> -	bool "Allwinner sun20i SoCs"
>> +menuconfig ARCH_SUNXI
>> +	bool "Allwinner RISC-V SoCs"
>> +
>> +if ARCH_SUNXI
>> +
>> +config ARCH_SUNXI_XUANTIE
> 
> 
> You should not get multiple ARCHs. ARCH is only one. There is also not
> much rationale in commit msg for that.

The main goal is to avoid choosing multiple IP addresses for erreta. 
If using Andes IPs, I don't want to choose XuanTIe (T-Head) ERRETA.

For example, v821 uses Andes ax27, but it used to select ERRATA_THEAD.

> 
> Best regards,
> Krzysztof