Re: [PATCH 2/2] x86/resctrl: Fix memory bandwidth counter width for Hygon

[Xiaochen Shen]

Hi Reinette,

On 12/6/2025 5:57 AM, Reinette Chatre wrote:
>> We have observed a test case where an incorrect counter width leads to random unexpected memory bandwidth readings:
>> https://github.com/shenxiaochen/my_documents/blob/main/memory_bandwidth_counter_width_and_overflow_issue_steps_to_reproduce.txt
> Could this perhaps be related to issue fixed by:
> 15292f1b4c55 ("x86/resctrl: Fix miscount of bandwidth event when reactivating previously unavailable RMID")?

Thank you for the information.
But I don't think this issue is related to commit 15292f1b4c55, which was already part of the code base when I discovered the problem.


Best regards,
Xiaochen Shen