Re: [Patch v6 05/22] perf/x86: Use x86_perf_regs in the x86 nmi handler

[Mi, Dapeng]

On 2/11/2026 2:40 AM, Peter Zijlstra wrote:
> On Mon, Feb 09, 2026 at 03:20:30PM +0800, Dapeng Mi wrote:
>> From: Kan Liang <kan.liang@xxxxxxxxxxxxxxx>
>>
>> More and more regs will be supported in the overflow, e.g., more vector
>> registers, SSP, etc. The generic pt_regs struct cannot store all of
>> them. Use a X86 specific x86_perf_regs instead.
>>
>> The struct pt_regs *regs is still passed to x86_pmu_handle_irq(). There
>> is no functional change for the existing code.
>>
>> AMD IBS's NMI handler doesn't utilize the static call
>> x86_pmu_handle_irq(). The x86_perf_regs struct doesn't apply to the AMD
>> IBS. It can be added separately later when AMD IBS supports more regs.
>>
>> Signed-off-by: Kan Liang <kan.liang@xxxxxxxxxxxxxxx>
>> Signed-off-by: Dapeng Mi <dapeng1.mi@xxxxxxxxxxxxxxx>
>> ---
>>  arch/x86/events/core.c | 4 +++-
>>  1 file changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
>> index 6df73e8398cd..8c80d22864d8 100644
>> --- a/arch/x86/events/core.c
>> +++ b/arch/x86/events/core.c
>> @@ -1785,6 +1785,7 @@ EXPORT_SYMBOL_FOR_KVM(perf_put_guest_lvtpc);
>>  static int
>>  perf_event_nmi_handler(unsigned int cmd, struct pt_regs *regs)
>>  {
>> +	struct x86_perf_regs x86_regs;
>>  	u64 start_clock;
> So a few patches ago you pulled this off stack because too large, and
> then here you stick it on stack again.
>
> That is a wee bit inconsistent.

Oh, yes. Just miss this place since no warning is reported here. Thanks.


>
> Furthermore, I think you can re-purpose that same off-stack copy. After
> all, the pebs_drain thing can only happen:
>
>  - from NMI (like here);
>  - from context switch, when PMU is disabled (and thus no NMIs).

I'm not sure if we can use only one x86_perf_regs instance for both PEBS
and non-PEBS sampling. It may be not. When PEBS and non-PEBS events are
overflowed simultaneously in a PMI, the GPRs' value of non-PEBS event could
be overwritten by the GPRs's value of PEBS events if non-PEBS events and
PEBS events share same x86_perf_regs instance. I need a further check on this.

Thanks.