Re: [PATCH v3 15/21] sched/cache: Disable cache aware scheduling for processes with high thread counts

[Madadi Vineeth Reddy]

Hi Peter,

On 19/02/26 22:25, Peter Zijlstra wrote:
> On Wed, Feb 18, 2026 at 11:24:05PM +0530, Madadi Vineeth Reddy wrote:
>> Is there a way to make this useful for architectures with small LLC
>> sizes? One possible approach we were exploring is to have LLC at a
>> hemisphere level that comprise multiple SMT4 cores.
> 
> Is this hemisphere an actual physical cache level, or would that be
> artificial?

It's artificial. There is no cache being shared at this level but this is
still the level where some amount of cache-snooping takes place and it is
relatively faster to access the data from the caches of the cores
within this domain.

We verified with this producer consumer workload where the producer
and consumer threads placed in the same hemisphere showed measurably
better latency compared to cross-hemisphere placement.

Thanks,
Vineeth