[PATCH] tools/turbostat: fix microcode patch level reading for AMD/Hygon

[Serhii Pievniev]

turbostat always used the same logic to read the microcode patch level,
which is correct for Intel but not for AMD/Hygon.
While Intel stores the patch level in the upper 32 bits of MSR, AMD
stores it in the lower 32 bits, which previously caused turbostat to
report the microcode version as 0x0 on AMD/Hygon.

Split the logic into two paths, using upper bits of MSR_IA32_UCODE_REV
for Intel and lower bits of MSR_AMD64_PATCH_LEVEL for AMD/Hygon.
Although both MSRs share the same address (0x8b), separate constants
make this semantic difference explicit.

Signed-off-by: Serhii Pievniev <spevnev16@xxxxxxxxx>
---
 tools/power/x86/turbostat/turbostat.c | 21 ++++++++++++++++-----
 1 file changed, 16 insertions(+), 5 deletions(-)

diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c
index 1a2671c2820..2698ac89376 100644
--- a/tools/power/x86/turbostat/turbostat.c
+++ b/tools/power/x86/turbostat/turbostat.c
@@ -9122,10 +9122,21 @@ void process_cpuid()
 	cpuid_has_hv = ecx_flags & (1 << 31);
 
 	if (!no_msr) {
-		if (get_msr(sched_getcpu(), MSR_IA32_UCODE_REV, &ucode_patch))
-			warnx("get_msr(UCODE)");
-		else
-			ucode_patch_valid = true;
+		if (authentic_amd || hygon_genuine) {
+			if (get_msr(sched_getcpu(), MSR_AMD64_PATCH_LEVEL, &ucode_patch)) {
+				warnx("get_msr(UCODE)");
+			} else {
+				ucode_patch_valid = true;
+				ucode_patch &= 0xFFFFFFFF;
+			}
+		} else {
+			if (get_msr(sched_getcpu(), MSR_IA32_UCODE_REV, &ucode_patch)) {
+				warnx("get_msr(UCODE)");
+			} else {
+				ucode_patch_valid = true;
+				ucode_patch = (ucode_patch >> 32) & 0xFFFFFFFF;
+			}
+		}
 	}
 
 	/*
@@ -9139,7 +9150,7 @@ void process_cpuid()
 	if (!quiet) {
 		fprintf(outf, "CPUID(1): family:model:stepping 0x%x:%x:%x (%d:%d:%d)", family, model, stepping, family, model, stepping);
 		if (ucode_patch_valid)
-			fprintf(outf, " microcode 0x%x", (unsigned int)((ucode_patch >> 32) & 0xFFFFFFFF));
+			fprintf(outf, " microcode 0x%llx", ucode_patch);
 		fputc('\n', outf);
 
 		fprintf(outf, "CPUID(0x80000000): max_extended_levels: 0x%x\n", max_extended_level);
-- 
2.53.0