Re: [PATCH] Docs: iio: ad7191: Correct clock configuration

[Andy Shevchenko]

On Fri, Feb 27, 2026 at 10:37:41AM -0500, Ammar Mustafa wrote:
> Correct the ad7191 documentation to match the datasheet:
> - Fix inverted CLKSEL pin logic: device should use external clock when low,
>   internal CMOS/crystal when high.
> - Correct CMOS-compatible clock pin from MCLK2 to MCLK1.

...

> -- When CLKSEL pin is tied LOW: Uses internal 4.92MHz clock (no clock property
> -  needed)
> -- When CLKSEL pin is tied HIGH: Requires external clock source
> +- When CLKSEL pin is tied LOW: Requires external clock source
>    - Can be a crystal between MCLK1 and MCLK2 pins
> -  - Or a CMOS-compatible clock driving MCLK2 pin
> +  - Or a CMOS-compatible clock driving MCLK1 pin and MCLK2 left unconnected
>    - Must specify the "clocks" property in device tree when using external clock
> +- When CLKSEL pin is tied HIGH: Uses internal 4.92MHz clock (no clock property
> +  needed)

Is it active-low or active-high pin?

...

When I see such a confusion in the documentation I propose to replace HIGH/LOW
to active/inactive or asserted/deasserted.

And no need to swap the entries.

-- 
With Best Regards,
Andy Shevchenko