Re: [PATCH 0/2] i2c: qcom-cci: Add DT property for SCL clock stretching

[Loic Poulain]

Hi Cory,

On Thu, Mar 5, 2026 at 3:40 PM Cory Keitz via B4 Relay
<devnull+ckeitz.amazon.com@xxxxxxxxxx> wrote:
>
> The Qualcomm CCI I2C controller has an SCL clock stretch enable bit in
> the MISC_CTL register. Currently the driver hardcodes this off in
> per-SoC hw_params tables, with no way to enable it from the device tree
> on a per-master basis.
>
> Clock stretching is required for GMSL configurations where the
> deserializer uses it to absorb the latency imposed by forwarding I2C
> transactions across the serial link. Without it, the CCI master exhibits
> intermittent transaction failure.
>
> This series adds a "qcom,scl-stretch-enable" boolean DT property to
> individual CCI i2c-bus sub-nodes. The property ORs with the existing
> hw_params default so it is purely additive and does not affect masters
> that do not set it.
>
> Tested on sa8775p using the qcom,sm8250-cci compatible string with two
> CCI buses connected to one max96724/max96717 GMSL2 pair each. Enabling
> this property eliminated intermittent NACK errors during serializer
> and/or deserializer probe.

I'm not convinced this kind of hardware behaviour belongs in
devicetree. As far as I understand, clock stretching is part of the
I2C specification, and slaves are allowed to use it whenever they need
additional time. Masters are therefore expected to tolerate
stretching. Given that, why not enable it unconditionally in the
driver? Is there any downside to doing so?

Regards,
Loic