Re: [PATCH v4] dt-bindings: display: ti, am65x-dss: Fix AM62L DSS reg and clock constraints
From: Rob Herring (Arm)
Date: Thu Apr 16 2026 - 08:28:56 EST
On Wed, 15 Apr 2026 16:34:09 +0530, Swamil Jain wrote:
> The AM62L DSS [1] support incorrectly used the same register and
> clock constraints as AM65x, but AM62L has a single video port
>
> Fix this by adding conditional constraints that properly define the
> register regions and clocks for AM62L DSS (single video port) versus
> other AM65x variants (dual video port).
>
> [1]: Section 12.7 (Display Subsystem and Peripherals)
> Link : https://www.ti.com/lit/pdf/sprujb4
>
> Fixes: cb8d4323302c ("dt-bindings: display: ti,am65x-dss: Add support for AM62L DSS")
> Cc: stable@xxxxxxxxxxxxxxx
> Signed-off-by: Swamil Jain <s-jain1@xxxxxx>
> ---
> Validated the changes with some examples:
> https://gist.github.com/swamiljain/79f30568c9ece89f5a20218f52647486
>
> Changelog:
> v3->v4:
> - Add reg-names constraint
> - Re-order constraints to make it consistent with the properties order
>
> Link to v3:
> https://lore.kernel.org/all/20260410105955.843868-1-s-jain1@xxxxxx/
>
> v2->v3:
> - Reduce redundancy and use constraints suggested by maintainers
> - Remove blank line between the tags
>
> Link to v2:
> https://lore.kernel.org/all/20260129150601.185882-1-s-jain1@xxxxxx/
>
> v1->v2:
> - Remove oneOf from top level constraints, it makes bindings redundant
> - Remove minItems from top level constraints
> - "dma-coherent" property shouldn't be changed in v1 itself
> - Add description for reg-names, clock and clock-names
> - Add constraints specific to AM62L and for other SoCs within allOf
> check
>
> Link to v1:
> https://lore.kernel.org/all/20251224133150.2266524-1-s-jain1@xxxxxx/
> ---
> .../bindings/display/ti/ti,am65x-dss.yaml | 70 ++++++++++++++-----
> 1 file changed, 52 insertions(+), 18 deletions(-)
>
Applied, thanks!