[PATCH] drm/amd/display: Add FPU guards around dcn31/315/316 update_bw_bounding_box

From: Mikhail Gavrilov

Date: Thu Apr 16 2026 - 20:15:23 EST

Commit 3539437f354b ("drm/amd/display: Move FPU Guards From DML To DC -
Part 1") moved DC_FP_START/DC_FP_END out of the DML FPU units into the
DC resource layer for dcn35, dcn351, dcn36, dcn401 and dcn42, but missed
the dcn31 family: the dcn31, dcn315 and dcn316 resource pools still wire
their .update_bw_bounding_box callback directly to the FPU-unit
functions dcn31_update_bw_bounding_box(), dcn315_update_bw_bounding_box()
and dcn316_update_bw_bounding_box() defined in dml/dcn31/dcn31_fpu.c.
Those functions call dc_assert_fp_enabled() on entry, which now fires
on every amdgpu probe on affected parts because no caller wraps them in
DC_FP_START/DC_FP_END anymore.

Triggered on amdgpu probe on a Ryzen 7000 (Raphael) iGPU, which uses
dcn315:

WARNING: drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/dc_fpu.c:58
at dc_assert_fp_enabled+0x14/0x20 [amdgpu]
RIP: 0010:dc_assert_fp_enabled+0x14/0x20 [amdgpu]
Call Trace:
dcn315_update_bw_bounding_box+0x1c/0x17a0 [amdgpu]
dc_create_resource_pool+0x4a0/0x770 [amdgpu]
dc_construct+0xa0a/0x13b0 [amdgpu]
dc_create+0x6f/0x8b0 [amdgpu]
amdgpu_dm_init+0x740/0xc80 [amdgpu]
dm_hw_init+0x45/0x150 [amdgpu]
amdgpu_device_ip_init+0xe21/0x11e1 [amdgpu]
amdgpu_device_init.cold+0xc03/0x1819 [amdgpu]
amdgpu_driver_load_kms+0x19/0xa0 [amdgpu]
amdgpu_pci_probe+0x371/0xbc0 [amdgpu]

Apply the same pattern the offending commit used for dcn35 (and that
dcn314 already followed before the commit): rename the FPU-unit entry
points with an _fpu suffix and add non-FPU static wrappers in the
resource files which provide DC_FP_START/DC_FP_END around the call.

Fixes: 3539437f354b ("drm/amd/display: Move FPU Guards From DML To DC - Part 1")
Signed-off-by: Mikhail Gavrilov <mikhail.v.gavrilov@xxxxxxxxx>
---

Tested on Ryzen 7000 (Raphael) with RX 7900 XTX discrete GPU, debug
kernel (KASAN + LOCKDEP + PREEMPT_FULL). Without the patch, the WARN
fires on every boot during amdgpu probe for the iGPU (dcn315). With
the patch applied, amdgpu probes cleanly and no dc_assert_fp_enabled
warnings occur.

drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c | 6 +++---
drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.h | 6 +++---
.../gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c | 7 +++++++
.../drm/amd/display/dc/resource/dcn315/dcn315_resource.c | 7 +++++++
.../drm/amd/display/dc/resource/dcn316/dcn316_resource.c | 7 +++++++
5 files changed, 27 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c
index 1a28061bb9ff..ad23215da9f8 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c
@@ -587,7 +587,7 @@ void dcn31_calculate_wm_and_dlg_fp(
context->bw_ctx.bw.dcn.compbuf_size_kb = context->bw_ctx.dml.ip.config_return_buffer_size_in_kbytes - total_det;
}

-void dcn31_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params)
+void dcn31_update_bw_bounding_box_fpu(struct dc *dc, struct clk_bw_params *bw_params)
{
struct _vcs_dpi_voltage_scaling_st *s = dc->scratch.update_bw_bounding_box.clock_limits;
struct clk_limit_table *clk_table = &bw_params->clk_table;
@@ -665,7 +665,7 @@ void dcn31_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params
dml_init_instance(&dc->dml, &dcn3_1_soc, &dcn3_1_ip, DML_PROJECT_DCN31);
}

-void dcn315_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params)
+void dcn315_update_bw_bounding_box_fpu(struct dc *dc, struct clk_bw_params *bw_params)
{
struct clk_limit_table *clk_table = &bw_params->clk_table;
int i, max_dispclk_mhz = 0, max_dppclk_mhz = 0;
@@ -726,7 +726,7 @@ void dcn315_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_param
dml_init_instance(&dc->dml, &dcn3_15_soc, &dcn3_15_ip, DML_PROJECT_DCN315);
}

-void dcn316_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params)
+void dcn316_update_bw_bounding_box_fpu(struct dc *dc, struct clk_bw_params *bw_params)
{
struct _vcs_dpi_voltage_scaling_st *s = dc->scratch.update_bw_bounding_box.clock_limits;
struct clk_limit_table *clk_table = &bw_params->clk_table;
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.h b/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.h
index dfcc5d50071e..0b7fcbbfd17b 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.h
@@ -44,9 +44,9 @@ void dcn31_calculate_wm_and_dlg_fp(
int pipe_cnt,
int vlevel);

-void dcn31_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params);
-void dcn315_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params);
-void dcn316_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params);
+void dcn31_update_bw_bounding_box_fpu(struct dc *dc, struct clk_bw_params *bw_params);
+void dcn315_update_bw_bounding_box_fpu(struct dc *dc, struct clk_bw_params *bw_params);
+void dcn316_update_bw_bounding_box_fpu(struct dc *dc, struct clk_bw_params *bw_params);
int dcn_get_max_non_odm_pix_rate_100hz(struct _vcs_dpi_soc_bounding_box_st *soc);
int dcn_get_approx_det_segs_required_for_pstate(
struct _vcs_dpi_soc_bounding_box_st *soc,
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
index ee4bc2c2e73a..d5215a028626 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
@@ -1854,6 +1854,13 @@ static struct dc_cap_funcs cap_funcs = {
.get_dcc_compression_cap = dcn20_get_dcc_compression_cap
};

+static void dcn31_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params)
+{
+ DC_FP_START();
+ dcn31_update_bw_bounding_box_fpu(dc, bw_params);
+ DC_FP_END();
+}
+
static struct resource_funcs dcn31_res_pool_funcs = {
.destroy = dcn31_destroy_resource_pool,
.link_enc_create = dcn31_link_encoder_create,
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
index 2ca673114841..c48ac609ce7c 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
@@ -1849,6 +1849,13 @@ static struct dc_cap_funcs cap_funcs = {
.get_dcc_compression_cap = dcn20_get_dcc_compression_cap
};

+static void dcn315_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params)
+{
+ DC_FP_START();
+ dcn315_update_bw_bounding_box_fpu(dc, bw_params);
+ DC_FP_END();
+}
+
static struct resource_funcs dcn315_res_pool_funcs = {
.destroy = dcn315_destroy_resource_pool,
.link_enc_create = dcn31_link_encoder_create,
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c
index 2242df112a3f..914d91df174c 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c
@@ -1725,6 +1725,13 @@ static struct dc_cap_funcs cap_funcs = {
.get_dcc_compression_cap = dcn20_get_dcc_compression_cap
};

+static void dcn316_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params)
+{
+ DC_FP_START();
+ dcn316_update_bw_bounding_box_fpu(dc, bw_params);
+ DC_FP_END();
+}
+
static struct resource_funcs dcn316_res_pool_funcs = {
.destroy = dcn316_destroy_resource_pool,
.link_enc_create = dcn31_link_encoder_create,
--
2.53.0