Re: [PATCH v2 6/6] ASoC: dt-bindings: renesas,fsi: add support for multiple clocks

[Bui Duc Phuc]

Hi Geert,

Thanks you for your review and suggestion.

I think this approach looks very good.
>     clock-names:
>       minItems: 1
>       maxItems: 8
>       items:
>        - fck # Main FSI module clock
>         - spu # optional SPU bus/bridge clock [...]
>         - icka # optional CPG DIV6 functional clocks for FSI port A
>         - ickb # optional CPG DIV6 functional clocks for FSI port B
>          [...]

Just to confirm: using this approach with a fixed order and optional
entries as described would not be
considered "flexible" in the sense that Krzysztof objected to, right?

Best regards,
Phuc