Re: [PATCH v10 03/28] gpu: nova-core: Hopper/Blackwell: basic GPU identification

[Alexandre Courbot]

On Fri Apr 17, 2026 at 4:27 PM JST, Alexandre Courbot wrote:
> On Tue Apr 14, 2026 at 6:29 AM JST, John Hubbard wrote:
>> On 4/13/26 2:21 PM, Timur Tabi wrote:
>>> On Mon, 2026-04-13 at 14:08 -0700, John Hubbard wrote:
>>>>> Can you add something to the patch description that explains why Blackwell, unlike all of the
>>>>> olther architectures, is represented by two Architecture enums?
>>>>
>>>> How's this:
>>>>
>>>> Blackwell uses two Architecture variants because the hardware itself
>>>> exposes two distinct architecture IDs in NV_PMC_BOOT_0: 0x1A for
>>
>> This is really what drove it, for me, though: the hardware itself
>> saw fit to identify these two variants as architectures. It's
>> encoded into the very fabric of space-time itself! haha :)
>>
>>>> GB10x (GB100, GB102) and 0x1B for GB20x (GB202, GB203, GB205, GB206,
>>>> GB207). Open RM maps these into separate chip families with distinct
>>>> HAL routing and different firmware signature sections.
>>> 
>>> We don't need two arch's for Ampere to handle different firmware signature sections.  Looking
>>> through your patches, the vast majority do this:
>>> 
>>> 	Architecture::BlackwellGB10x | Architecture::BlackwellGB20x
>>> 
>>> Looking through your patches, it seems overkill to separate these two.  The one or two instances
>>> where it makes a difference, an if-statement will suffice.
>
> I have to agree here, if we didn't split then the architecture IDs
> `0x1a` and `0x1b` would need to both map to Blackwell, which makes them
> impossible to represent correctly using an enum.

Sorry, I misquoted the email in my reply - to clarify, I agree with
John's point that GB10x and GB20x need to be represented using two
different architectures. :)