[PATCH 02/40] arm64: dts: rockchip: Add frl-enable-gpios to rk3576-armsom-sige5

From: Cristian Ciocaltea

Date: Fri Apr 17 2026 - 05:42:53 EST


The board exposes the GPIO2_B0 line to control the voltage bias on the
HDMI data lines. It must be asserted when operating in HDMI 2.1 FRL
mode and deasserted for HDMI 1.4/2.0 TMDS mode.

Wire up the HDMI node to the GPIO line using the frl-enable-gpios
property to allow adjusting the bias when transitioning between TMDS and
FRL operating modes.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@xxxxxxxxxxxxx>
---
arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts | 8 ++++++++
1 file changed, 8 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts b/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts
index 1c100ffd1518..43a5c6859909 100644
--- a/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts
@@ -304,6 +304,8 @@ &gpu {
};

&hdmi {
+ pinctrl-0 = <&hdmi_txm0_pins &hdmi_tx_scl &hdmi_tx_sda &hdmi_frl_en>;
+ frl-enable-gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_LOW>;
status = "okay";
};

@@ -819,6 +821,12 @@ hp_det_l: hp-det-l {
};
};

+ hdmi {
+ hdmi_frl_en: hdmi-frl-en {
+ rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;

--
2.53.0