Re: [PATCH 05/11] media: iris: Enable Secure PAS support with IOMMU managed by Linux

[Vishnu Reddy]

On 4/14/2026 7:39 PM, Konrad Dybcio wrote:
> On 4/14/26 7:00 AM, Vishnu Reddy wrote:
> > From: Mukesh Ojha<mukesh.ojha@xxxxxxxxxxxxxxxx>
> >
> > Most Qualcomm platforms feature a proprietary hypervisor (such as Gunyah
> > or QHEE), which typically handles IOMMU configuration. This includes
> > mapping memory regions and device memory resources for remote processors
> > by intercepting qcom_scm_pas_auth_and_reset() calls. These mappings are
> > later removed during teardown. Additionally, SHM bridge setup is required
> > to enable memory protection for both remoteproc metadata and its memory
> > regions.
> >
> > When the hypervisor is absent, the operating system must perform these
> > configurations instead.
> >
> > Support for handling IOMMU and SHM setup in the absence of a hypervisor
> > is now in place. Extend the Iris driver to enable this functionality on
> > platforms where IOMMU is managed by Linux (i.e., non-Gunyah, non-QHEE).
> >
> > Additionally, the Iris driver must map the firmware and its required
> > resources to the firmware SID, which is now specified via iommu-map in
> > the device tree.
> >
> > Co-developed-by: Vikash Garodia<vikash.garodia@xxxxxxxxxxxxxxxx>
> > Signed-off-by: Vikash Garodia<vikash.garodia@xxxxxxxxxxxxxxxx>
> > Signed-off-by: Mukesh Ojha<mukesh.ojha@xxxxxxxxxxxxxxxx>
> > Signed-off-by: Vishnu Reddy<busanna.reddy@xxxxxxxxxxxxxxxx>
> > ---
> [...]
>
> >   static int iris_load_fw_to_memory(struct iris_core *core, const char *fw_name)
> >   {
> > +	struct device *dev = core->dev_fw ? core->dev_fw : core->dev;
> Maybe:
>
> struct device *fw_dev = core->dev_fw ?: core->dev;
>
> and preserve *dev to be the main Iris device?

That's better, ack.

Thanks,
Vishnu Reddy.

> Konrad