RE:[net-next v2 4/5] net: stmmac: starfive: Add JHB100 SGMII interface

[Sai Krishna Gajula]

> -----Original Message-----
> From: Minda Chen <minda.chen@xxxxxxxxxxxxxxxx>
> Sent: Friday, April 17, 2026 8:15 AM
> To: Alexandre Torgue <alexandre.torgue@xxxxxxxxxxx>; Andrew Lunn
> <andrew+netdev@xxxxxxx>; David S . Miller <davem@xxxxxxxxxxxxx>; Eric
> Dumazet <edumazet@xxxxxxxxxx>; Jakub Kicinski <kuba@xxxxxxxxxx>; Paolo
> Abeni <pabeni@xxxxxxxxxx>; Maxime Coquelin
> <mcoquelin.stm32@xxxxxxxxx>; Emil Renner Berthing
> <emil.renner.berthing@xxxxxxxxxxxxx>; Rob Herring <robh+dt@xxxxxxxxxx>;
> Krzysztof Kozlowski <krzk+dt@xxxxxxxxxx>; Conor Dooley
> <conor@xxxxxxxxxx>; netdev@xxxxxxxxxxxxxxx
> Cc: linux-kernel@xxxxxxxxxxxxxxx; linux-stm32@st-md-
> mailman.stormreply.com; devicetree@xxxxxxxxxxxxxxx; Minda Chen
> <minda.chen@xxxxxxxxxxxxxxxx>
> Subject: [net-next v2 4/5] net: stmmac: starfive: Add JHB100
> SGMII interface
> 
> Add JHB100 compatible and SGMII support. JHB100 soc contains 2 SGMII
> interfaces and integrated with serdes PHY. SGMII with split TX/RX MAC clock
> and need to set 2. 5M/25M/125M TX/RX clock rate in 10M/100M/1000M
> speed mode. Signed-off-by:  
> Add JHB100 compatible and SGMII support. JHB100 soc contains
> 2 SGMII interfaces and integrated with serdes PHY. SGMII with split TX/RX
> MAC clock and need to set 2.5M/25M/125M TX/RX clock rate in
> 10M/100M/1000M speed mode.
> 
> Signed-off-by: Minda Chen <minda.chen@xxxxxxxxxxxxxxxx>
> ---
>  .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 54 ++++++++++++++-----
>  1 file changed, 42 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> index 16b955a6d77b..91698c763dac 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> @@ -26,6 +26,7 @@ struct starfive_dwmac_data {  struct starfive_dwmac {
>  	struct device *dev;
>  	const struct starfive_dwmac_data *data;
> +	struct clk *sgmii_rx;
>  };
> 
>  static int starfive_dwmac_set_mode(struct plat_stmmacenet_data *plat_dat)
> @@ -68,6 +69,24 @@ static int starfive_dwmac_set_mode(struct
> plat_stmmacenet_data *plat_dat)
>  	return 0;
>  }
> 
> +static int stmmac_starfive_sgmii_set_clk_rate(void *bsp_priv, struct clk
> *clk_tx_i,
> +					      phy_interface_t interface, int
> speed) {

phy_interface_t interface is likely unused in stmmac_starfive_sgmii_set_clk_rate → may need __maybe_unused or (void)interface to avoid -Werror=unused-parameter on strict builds.

> +	struct starfive_dwmac *dwmac = (void *)bsp_priv;
> +	long rate = rgmii_clock(speed);
> +	int ret;
> +
> +	/* MAC clock rate the same as RGMII */
> +	if (rate < 0)
> +		return 0;
> +
> +	ret = clk_set_rate(clk_tx_i, rate);
> +	if (ret)
> +		return ret;
> +
> +	return clk_set_rate(dwmac->sgmii_rx, rate); }
> +
>  static int starfive_dwmac_probe(struct platform_device *pdev)  {
>  	struct plat_stmmacenet_data *plat_dat; @@ -102,24 +121,34 @@
> static int starfive_dwmac_probe(struct platform_device *pdev)
>  		return dev_err_probe(&pdev->dev, PTR_ERR(clk_gtx),
>  				     "error getting gtx clock\n");
> 
> -	/* Generally, the rgmii_tx clock is provided by the internal clock,
> -	 * which needs to match the corresponding clock frequency according
> -	 * to different speeds. If the rgmii_tx clock is provided by the
> -	 * external rgmii_rxin, there is no need to configure the clock
> -	 * internally, because rgmii_rxin will be adaptively adjusted.
> -	 */
> -	if (!device_property_read_bool(&pdev->dev, "starfive,tx-use-rgmii-
> clk"))
> -		plat_dat->set_clk_tx_rate = stmmac_set_clk_tx_rate;
> +	if (plat_dat->phy_interface == PHY_INTERFACE_MODE_SGMII) {
> +		dwmac->sgmii_rx = devm_clk_get_enabled(&pdev->dev,
> "sgmii_rx");
> +		if (IS_ERR(dwmac->sgmii_rx))
> +			return dev_err_probe(&pdev->dev,
> +					     PTR_ERR(dwmac->sgmii_rx),
> +					     "error getting sgmii rx clock\n");
> +		plat_dat->set_clk_tx_rate =
> stmmac_starfive_sgmii_set_clk_rate;
> +	} else {
> +		/*
> +		 * Generally, the rgmii_tx clock is provided by the internal
> clock,
> +		 * which needs to match the corresponding clock frequency
> according
> +		 * to different speeds. If the rgmii_tx clock is provided by the
> +		 * external rgmii_rxin, there is no need to configure the clock
> +		 * internally, because rgmii_rxin will be adaptively adjusted.
> +		 */
> +		if (!device_property_read_bool(&pdev->dev, "starfive,tx-use-
> rgmii-clk"))
> +			plat_dat->set_clk_tx_rate = stmmac_set_clk_tx_rate;
> +
> +		err = starfive_dwmac_set_mode(plat_dat);
> +		if (err)
> +			return err;
> +	}
> 
>  	dwmac->dev = &pdev->dev;
>  	plat_dat->flags |= STMMAC_FLAG_EN_TX_LPI_CLK_PHY_CAP;
>  	plat_dat->bsp_priv = dwmac;
>  	plat_dat->dma_cfg->dche = true;
> 
> -	err = starfive_dwmac_set_mode(plat_dat);
> -	if (err)
> -		return err;
> -
>  	return stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);  }
> 
> @@ -130,6 +159,7 @@ static const struct starfive_dwmac_data jh7100_data =
> {  static const struct of_device_id starfive_dwmac_match[] = {
>  	{ .compatible = "starfive,jh7100-dwmac", .data = &jh7100_data },
>  	{ .compatible = "starfive,jh7110-dwmac" },
> +	{ .compatible = "starfive,jhb100-dwmac" },
>  	{ /* sentinel */ }
>  };
>  MODULE_DEVICE_TABLE(of, starfive_dwmac_match);
> --
> 2.17.1
> 
Reviewed-by: Sai Krishna <saikrishnag@xxxxxxxxxxx>