Re: [PATCH RFC v2 02/11] ASoC: meson: aiu-encoder-i2s: use gx_iface and gx_stream structures

From: Valerio Setti

Date: Sun Apr 19 2026 - 19:17:45 EST



On 4/15/26 16:28, Jerome Brunet wrote:


Huh interresting, I had not thought of that. Valerio and I discussed the
clock part a lot for this rework. It is the crux since since the
interface and clock setting lives in the AIU subsys but serves both the
AIU and AUDIN subsys.

Valerio maybe you could keep function above just to set the rate, but
enabling the clocks through a DAPM supply widget ? This is kind of what
the AXG is doing.

what do you think ?

(actually in the AXG the each formatter widget call CCF
clk_prepare_enable() but a supply widget poking the register would do
the same thing)


Hi Jerome,

thanks for your review and suggestion.
I took some time to investigate it and I think I have a different proposal that reduces the amount of changes compared to the current implementation, but gets to the same result.

The thing is in "axg-tdm-interface.c" MCLK is enabled/disabled using "set_bias_level()" callback which works fine because in that case the interface driver is also a standalone component. On the GX platform the interface is a DAI which is part of the AIU component, so this callback isn't available. To get the same behavior I would need to add a new DAPM widget in "aiu_cpu_dapm_widgets[]" and then add it to both "aiu_cpu_dapm_routes[]" both in "aiu.c" and in the device-tree for AUDIN.

What if instead I add the "prepare()" callback to "aiu_encoder_i2s_dai_ops" and enable MCLK and I2S clock divider there? This would match "hw_free()" calls and it would be a change only internal to "aiu-encoder-i2s.c".
To support this I will:
- remove calls to "gx_stream_set_cont_clocks" which are arguably not very useful for the GX platform;
- use the "clk_enabled" field of "struct gx_stream" (unused after removal of "gx_stream_set_cont_clocks" calls) to track the status of MCLK and enable/disable it only when necessary (ex: prevent multiple calls to "prepare" to enable MCLK multiple times, etc);
- keep using "snd_soc_dai_active" in "hw_free" to know when to disable the I2S clock divider. Or perhaps I can rely on "clk_enabled" also for this one so that I can manage these 2 clocks uniformly.

Is this an acceptable alternative approach for you?

--
Valerio