[PATCH 1/2] dt-bindings: mailbox: qcom: Document Nord CPUCP mailbox controller

[Shawn Guo]

From: Deepti Jaggi <deepti.jaggi@xxxxxxxxxxxxxxxx>

Document CPUSS Control Processor (CPUCP) mailbox controller for Qualcomm
Nord SoC.  It has 16 IPC channels, compared to 3 on X1E80100 CPUCP.

Signed-off-by: Deepti Jaggi <deepti.jaggi@xxxxxxxxxxxxxxxx>
Signed-off-by: Shawn Guo <shengchao.guo@xxxxxxxxxxxxxxxx>
---
 Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml b/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml
index 90bfde66cc4a..2dd66a88c186 100644
--- a/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml
+++ b/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml
@@ -23,6 +23,7 @@ properties:
               - qcom,sm8750-cpucp-mbox
           - const: qcom,x1e80100-cpucp-mbox
       - enum:
+          - qcom,nord-cpucp-mbox
           - qcom,x1e80100-cpucp-mbox
 
   reg:
-- 
2.43.0