Re: [PATCH v1 3/3] pinctrl: qcom: lpass-lpi: Resume clocks for GPIO access

[Ajay Kumar Nandam]

On 4/14/2026 2:14 PM, Konrad Dybcio wrote:
> On 4/13/26 2:22 PM, Ajay Kumar Nandam wrote:
> > Ensure the LPI pinctrl device clocks are runtime resumed
> > before accessing GPIO registers and autosuspended after
> > the access completes.
> >
> > Guard GPIO register read and write helpers with synchronous
> > runtime PM calls so the device is active during MMIO
> > operations.
> >
> > Signed-off-by: Ajay Kumar Nandam <ajay.nandam@xxxxxxxxxxxxxxxx>
> > ---
> >   drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 18 ++++++++++++++++++
> >   1 file changed, 18 insertions(+)
> >
> > diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
> > index d108e7321..4275f2734 100644
> > --- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
> > +++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
> > @@ -49,8 +49,17 @@ static int lpi_gpio_read(struct lpi_pinctrl *state, unsigned int pin,
> >   	else
> >   		pin_offset = LPI_TLMM_REG_OFFSET * pin;
> >   
> > +	ret = pm_runtime_get_sync(state->dev);
> > +	if (ret < 0) {
> > +		pm_runtime_put_noidle(state->dev);
> > +		return ret;
> > +	}
>
> Okay that's how they can fail..
>
> Please move from pm_runtime_get_sync() to pm_runtime_resume_and_get() or
> someone will come around next week to "improve" it

ACK, Will update the patch accordingly and post v2

> > +
> >   	*val = ioread32(state->tlmm_base + pin_offset + addr);
> >   
> > +	pm_runtime_mark_last_busy(state->dev);
> > +	pm_runtime_put_autosuspend(state->dev);
>
> put_autosuspend() already does mark_last_busy() nowadays

ACK, Will update the patch accordingly and post v2

Thanks
Ajay Kumar Nandam
> Konrad