Re: [PATCH 2/3] dt-bindings: display: bridge: Document Renesas RZ/G3L LVDS encoder

From: Conor Dooley

Date: Mon Apr 20 2026 - 12:31:07 EST


On Fri, Apr 17, 2026 at 06:52:29PM +0100, Biju wrote:
> From: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
>
> Document the LVDS encoder IP found on the RZ/G3L SoC. It supports
> single-link mode. LVDS and the DSI interface share a peripheral clock and
> the MIPI_DSI_PRESET_N reset signal. However, the LVDS module cannot be
> used at the same time as MIPI-DSI.
>
> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@xxxxxxxxxxxxxx>
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>

Acked-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
pw-bot: not-applicable

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