Re: [PATCH] perf/x86/intel: Remove anythread_deprecated bit from perf_capabilities
From: Mi, Dapeng
Date: Tue Apr 21 2026 - 20:46:27 EST
On 4/22/2026 5:58 AM, Chen, Zide wrote:
>
> On 4/20/2026 5:51 PM, Mi, Dapeng wrote:
>> On 4/21/2026 5:23 AM, Namhyung Kim wrote:
>>> On Wed, Apr 15, 2026 at 10:10:10AM +0800, Dapeng Mi wrote:
>>>> AnyThread mode deprecation is enumerated by CPUID.0AH:EDX[15] instead of
>>>> PERF_CAPABILITIES MSR. It's not a good practice to define a bit to
>>>> represent "anythread deprecation" in perf_capabilities. It leads to the
>>>> anythread_deprecated bit could be overwritten by the real value of
>>>> PERF_CAPABILITIES MSR, just like the below code in update_pmu_cap() does.
>>>>
>>>> ```
>>>> if (!intel_pmu_broken_perf_cap()) {
>>>> /* Perf Metric (Bit 15) and PEBS via PT (Bit 16) are hybrid enumeration */
>>>> rdmsrq(MSR_IA32_PERF_CAPABILITIES, hybrid(pmu, intel_cap).capabilities);
>>>> }
>>>> ```
>>>>
>>>> It leads to the anythread_deprecated bit is cleared to 0 and the "any"
>>>> attribute is incorrectly shown in the /sys/devices/cpu/format/ folder on
>>>> these support Perfmon v6 platforms, like Clearwater Forest.
>>>>
>>>> ```
>>>> $grep . /sys/devices/cpu/format/*
>>>> /sys/devices/cpu/format/acr_mask:config2:0-63
>>>> /sys/devices/cpu/format/any:config:21
>>>> /sys/devices/cpu/format/cmask:config:24-31
>>>> ```
>>>>
>>>> So remove the anythread_deprecated bit from perf_capabilities structure
>>>> and directly depends on CPUID.0AH:EDX[15] to judge if anythread is
>>>> deprecated.
>>>>
>>>> Cc: stable@xxxxxxxxxxxxxxx
>>>> Reported-by: Namhyung Kim <namhyung@xxxxxxxxxx>
>>>> Fixes: cadbaa039b99 ("perf/x86/intel: Make anythread filter support conditional")
>>>> Acked-by: Namhyung Kim <namhyung@xxxxxxxxxx>
>>>> Signed-off-by: Dapeng Mi <dapeng1.mi@xxxxxxxxxxxxxxx>
>>>> ---
>>>> arch/x86/events/intel/core.c | 9 +++------
>>>> arch/x86/events/perf_event.h | 2 +-
>>>> 2 files changed, 4 insertions(+), 7 deletions(-)
>>>>
>>>> diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
>>>> index 793335c3ce78..450c63165a22 100644
>>>> --- a/arch/x86/events/intel/core.c
>>>> +++ b/arch/x86/events/intel/core.c
>>>> @@ -7612,11 +7612,8 @@ __init int intel_pmu_init(void)
>>>>
>>>> x86_add_quirk(intel_arch_events_quirk); /* Install first, so it runs last */
>>>>
>>>> - if (version >= 5) {
>>>> - x86_pmu.intel_cap.anythread_deprecated = edx.split.anythread_deprecated;
>>>> - if (x86_pmu.intel_cap.anythread_deprecated)
>>>> - pr_cont(" AnyThread deprecated, ");
>>>> - }
>>>> + if (version >= 5 && edx.split.anythread_deprecated)
>>>> + pr_cont(" AnyThread deprecated, ");
>>>>
>>>> /* The perf side of core PMU is ready to support the mediated vPMU. */
>>>> x86_get_pmu(smp_processor_id())->capabilities |= PERF_PMU_CAP_MEDIATED_VPMU;
>>>> @@ -8467,7 +8464,7 @@ __init int intel_pmu_init(void)
>>>> &x86_pmu.intel_ctrl);
>>>>
>>>> /* AnyThread may be deprecated on arch perfmon v5 or later */
>>>> - if (x86_pmu.intel_cap.anythread_deprecated)
>>>> + if (edx.split.anythread_deprecated)
>>> Do we need to check the version here as well?
>> hmm, it should be enough to only check the CPUID
>> "edx.split.anythread_deprecated" bit in practice. But if we want to follow
>> the SDM 100%, the version check should be added here.
>>
>> I would add an version check here. Thanks.
> How about merging pr_cont(" AnyThread deprecated, ") to here? No need to
> repeat "if (version >= 5 && edx.split.anythread_deprecated)" twice in
> one single API.
OK. Although it would change the perfmon print message order slightly, on
one should care about the message order. Thanks.
>
>
>>> Thanks,
>>> Namhyung
>>>
>>>
>>>> x86_pmu.format_attrs = intel_arch_formats_attr;
>>>>
>