Re: [PATCH] arm64: dts: qcom: glymur: Drop fake PCIe phy 3B

[Dmitry Baryshkov]

On Tue, Apr 21, 2026 at 08:41:14AM +0200, Krzysztof Kozlowski wrote:
> On 20/04/2026 20:02, Dmitry Baryshkov wrote:
> > On Mon, Apr 20, 2026 at 03:36:17PM +0200, Krzysztof Kozlowski wrote:
> >> According to user manual / programming guide there is no separate PCIe
> >> phy 3A and 3B, but one 8-lane QMP PCIe Gen5 PHY which consists of two
> >> 4-lane blocks.  This is also visible in memory map, where the 0xf00000
> >> is marked as the main block with additional sub blocks for each 4-lane
> >> phys.
> >>
> >> Describing the sub phys without the rest is not correct from hardware
> >> description, even if it works.
> > 
> > Is this the case for the other bifurcated PHYs?
> > 
> 
> There's more? Oh damn...

In the previous generations. I think Hamoa had one.

-- 
With best wishes
Dmitry