Re: [PATCH v3 01/10] ASoC: dt-bindings: renesas,fsi: add support multiple clocks

[Geert Uytterhoeven]

Hi Phuc,

Thanks for the update!

On Sun, 10 May 2026 at 10:43, <phucduc.bui@xxxxxxxxx> wrote:
> From: bui duc phuc <phucduc.bui@xxxxxxxxx>
>
> The FSI on r8a7740 requires the SPU bus/bridge clock to be enabled before
> accessing its registers. Without this clock, any register access leads to
> a system hang as the FSI block sits behind the SPU bus.
> Update the binding to support multiple clocks to properly describe the
> hardware clock tree, including:
>   - SPU bus/bridge clock (spu) for register access.
>   - CPG DIV6 clocks (icka/b) as functional clock parents.
>   - FSI internal dividers (diva/b) for audio clock generation.
>   - External clock inputs (xcka/b) provided by the board.
>
> Suggested-by: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>

Please drop this tag: it is intended for giving credit to the person
who suggested the creation of this (full) patch, and not for crediting
review comments on a previous version.

> Signed-off-by: bui duc phuc <phucduc.bui@xxxxxxxxx>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds