Re: [PATCH v7 3/5] iio: adc: versal-sysmon: add I2C driver
From: Erim, Salih
Date: Tue Jun 16 2026 - 08:17:56 EST
Hi Andy,
On 16/06/2026 08:45, Andy Shevchenko wrote:
On Mon, Jun 15, 2026 at 04:42:43PM +0100, Erim, Salih wrote:
On 15/06/2026 15:30, Andy Shevchenko wrote:
On Mon, Jun 15, 2026 at 12:37:20AM +0100, Salih Erim wrote:
...
+static const struct regmap_config sysmon_i2c_regmap_config = {
+ .reg_bits = 32,
+ .val_bits = 32,
+ .reg_stride = SYSMON_REG_STRIDE,
+ .max_register = SYSMON_MAX_REG,
+ .reg_read = sysmon_i2c_reg_read,
+ .reg_write = sysmon_i2c_reg_write,
+};
No cache?
No, the registers are live ADC readings and interrupt status.
Caching would return stale voltage and temperature data.
So, basically what you are saying is this:
"All registers are volatile in this HW."
Or alternatively:
"Almost all registers are volatile in this HW. The rest is not being accessed
too often to cache."
Choose the one that fits and add on top of this regmap_config initialiser.
The second one fits. Will add a comment in v8:
/*
* Almost all registers are volatile (live ADC readings, interrupt
* status). The rest are not accessed often enough to benefit from
* caching.
*/
Thanks,
Salih
--
With Best Regards,
Andy Shevchenko