Re: [PATCH v3 4/4] edac: xilinx: Add EDAC support for Versal XilSem

[Julian Braha]

Hi Rama,

On 6/24/26 22:25, Rama devi Veggalam wrote:
>  config EDAC_VERSAL
> -	tristate "Xilinx Versal DDR Memory Controller"
> +	tristate "Xilinx Versal DDR Memory Controller and XilSEM"
>  	depends on ARCH_ZYNQMP || COMPILE_TEST
>  	help
>  	  Support for error detection and correction on the Xilinx Versal DDR
> -	  memory controller.
> +	  memory controller and configuration memory of the programmable logic (PL) fabric. Support detection of errors in Network on Chip (NoC) peripheral interconnect (NPI) Registers.

This line of kconfig 'help' is far too long. See
Documentation/process/coding-style.rst
and
Documentation/kbuild/kconfig-language.rst

- Julian Braha