[PATCH 2/2] PCI: ultrarisc: get and enable DP1000 PCIe clocks
From: Jia Wang via B4 Relay
Date: Mon Jun 29 2026 - 02:00:38 EST
From: Jia Wang <wangjia@xxxxxxxxxxxxx>
Add the required core, dbi, and aux clocks for the DP1000 PCIe
controller and enable them before initializing the DesignWare host.
Also manage the clocks across system suspend and resume.
Signed-off-by: Jia Wang <wangjia@xxxxxxxxxxxxx>
---
drivers/pci/controller/dwc/pcie-ultrarisc.c | 74 ++++++++++++++++++++++++++---
1 file changed, 67 insertions(+), 7 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-ultrarisc.c b/drivers/pci/controller/dwc/pcie-ultrarisc.c
index 6ee661ceff67..74010a86244e 100644
--- a/drivers/pci/controller/dwc/pcie-ultrarisc.c
+++ b/drivers/pci/controller/dwc/pcie-ultrarisc.c
@@ -5,6 +5,7 @@
* Copyright (C) 2026 UltraRISC Technology (Shanghai) Co., Ltd.
*/
+#include <linux/clk.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of_device.h>
@@ -23,6 +24,11 @@
#define ULTRARISC_PCIE_COMP_TIMEOUT_65_210MS 0x6
+struct ultrarisc_pcie {
+ struct dw_pcie pci;
+ struct clk_bulk_data clks[3];
+};
+
static struct pci_ops ultrarisc_pci_ops = {
.map_bus = dw_pcie_own_conf_map_bus,
.read = pci_generic_config_read32,
@@ -98,17 +104,46 @@ static const struct dw_pcie_ops dw_pcie_ops = {
.start_link = ultrarisc_pcie_start_link,
};
+static void ultrarisc_pcie_disable_clks(void *data)
+{
+ struct ultrarisc_pcie *ultra = data;
+
+ clk_bulk_disable_unprepare(ARRAY_SIZE(ultra->clks), ultra->clks);
+}
+
+static int ultrarisc_pcie_init_clks(struct ultrarisc_pcie *ultra)
+{
+ struct device *dev = ultra->pci.dev;
+ int ret;
+
+ ultra->clks[0].id = "core";
+ ultra->clks[1].id = "dbi";
+ ultra->clks[2].id = "aux";
+
+ ret = devm_clk_bulk_get(dev, ARRAY_SIZE(ultra->clks), ultra->clks);
+ if (ret)
+ return dev_err_probe(dev, ret, "Failed to get clocks\n");
+
+ ret = clk_bulk_prepare_enable(ARRAY_SIZE(ultra->clks), ultra->clks);
+ if (ret)
+ return dev_err_probe(dev, ret, "Failed to enable clocks\n");
+
+ return devm_add_action_or_reset(dev, ultrarisc_pcie_disable_clks, ultra);
+}
+
static int ultrarisc_pcie_probe(struct platform_device *pdev)
{
+ struct ultrarisc_pcie *ultra;
struct device *dev = &pdev->dev;
struct dw_pcie_rp *pp;
struct dw_pcie *pci;
int ret;
- pci = devm_kzalloc(dev, sizeof(*pci), GFP_KERNEL);
- if (!pci)
+ ultra = devm_kzalloc(dev, sizeof(*ultra), GFP_KERNEL);
+ if (!ultra)
return -ENOMEM;
+ pci = &ultra->pci;
pci->dev = dev;
pci->ops = &dw_pcie_ops;
@@ -117,7 +152,11 @@ static int ultrarisc_pcie_probe(struct platform_device *pdev)
pp = &pci->pp;
- platform_set_drvdata(pdev, pci);
+ platform_set_drvdata(pdev, ultra);
+
+ ret = ultrarisc_pcie_init_clks(ultra);
+ if (ret)
+ return ret;
pp->num_vectors = MAX_MSI_IRQS;
/* No L2/L3 Ready indication is available on this platform */
@@ -135,16 +174,37 @@ static int ultrarisc_pcie_probe(struct platform_device *pdev)
static int ultrarisc_pcie_suspend_noirq(struct device *dev)
{
- struct dw_pcie *pci = dev_get_drvdata(dev);
+ struct ultrarisc_pcie *ultra = dev_get_drvdata(dev);
+ struct dw_pcie *pci = &ultra->pci;
+ int ret;
+
+ ret = dw_pcie_suspend_noirq(pci);
+ if (ret)
+ return ret;
- return dw_pcie_suspend_noirq(pci);
+ if (pci->suspended)
+ clk_bulk_disable_unprepare(ARRAY_SIZE(ultra->clks), ultra->clks);
+
+ return 0;
}
static int ultrarisc_pcie_resume_noirq(struct device *dev)
{
- struct dw_pcie *pci = dev_get_drvdata(dev);
+ struct ultrarisc_pcie *ultra = dev_get_drvdata(dev);
+ struct dw_pcie *pci = &ultra->pci;
+ int ret;
+
+ if (pci->suspended) {
+ ret = clk_bulk_prepare_enable(ARRAY_SIZE(ultra->clks), ultra->clks);
+ if (ret)
+ return ret;
+ }
+
+ ret = dw_pcie_resume_noirq(pci);
+ if (ret && pci->suspended)
+ clk_bulk_disable_unprepare(ARRAY_SIZE(ultra->clks), ultra->clks);
- return dw_pcie_resume_noirq(pci);
+ return ret;
}
static const struct dev_pm_ops ultrarisc_pcie_pm_ops = {
--
2.34.1