Re: [PATCH 2/2] iio: accel: mma8452: Allow open drain interrupt pin configuration
From: Joshua Crofts
Date: Wed Jul 15 2026 - 04:51:15 EST
On Wed, 15 Jul 2026 10:07:39 +0200
Esben Haabendal <esben@xxxxxxxxxx> wrote:
> When sharing interrupt line with other chips, the interrupt pin most
> likely needs to be configured in open-drain mode instead of push-pull.
> If this is needed, you must add drive-open-drain property to the
> device-tree.
Why are you mentioning the device tree in the commit message? Just keep
the first sentence + a short description of what you added/changed/removed.
> Signed-off-by: Esben Haabendal <esben@xxxxxxxxxx>
> ---
> drivers/iio/accel/mma8452.c | 29 ++++++++++++++++++++++++++++-
> 1 file changed, 28 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c
> index 7d683686dd9d..a20c02ce0b9c 100644
> --- a/drivers/iio/accel/mma8452.c
> +++ b/drivers/iio/accel/mma8452.c
> @@ -81,6 +81,8 @@
> #define MMA8452_CTRL_REG2_RST BIT(6)
> #define MMA8452_CTRL_REG2_MODS_SHIFT 3
> #define MMA8452_CTRL_REG2_MODS_MASK 0x1b
> +#define MMA8452_CTRL_REG3 0x2c
> +#define MMA8452_CTRL_REG3_PP_OD BIT(0)
I know that the defines are completely incorrectly aligned, but please
ensure that at least all the defines in this block are aligned.
Also, consider sending a patch which aligns all the other defines.
> #define MMA8452_CTRL_REG4 0x2d
> #define MMA8452_CTRL_REG5 0x2e
> #define MMA8452_OFF_X 0x2f
> @@ -108,6 +110,7 @@ struct mma8452_data {
> struct iio_mount_matrix orientation;
> u8 ctrl_reg1;
> u8 data_cfg;
> + bool open_drain;
Hmm, i checked pahole and it says there is a 1 byte hole, maybe try some more
reordering to pack it?
> const struct mma_chip_info *chip_info;
> int sleep_val;
> struct regulator *vdd_reg;
> @@ -646,6 +649,22 @@ static int mma8452_set_power_mode(struct mma8452_data *data, u8 mode)
> return mma8452_change_config(data, MMA8452_CTRL_REG2, reg);
> }
>
> +static int mma8452_set_interrupt_pin_mode(struct mma8452_data *data)
> +{
> + int reg;
> +
> + reg = i2c_smbus_read_byte_data(data->client, MMA8452_CTRL_REG3);
> + if (reg < 0)
> + return reg;
> +
> + if (data->open_drain)
> + reg |= MMA8452_CTRL_REG3_PP_OD;
> + else
> + reg &= ~MMA8452_CTRL_REG3_PP_OD;
> +
> + return i2c_smbus_write_byte_data(data->client, MMA8452_CTRL_REG3, reg);
> +}
> +
> /* returns >0 if in freefall mode, 0 if not or <0 if an error occurred */
> static int mma8452_freefall_mode_enabled(struct mma8452_data *data)
> {
> @@ -1666,6 +1685,9 @@ static int mma8452_probe(struct i2c_client *client)
> goto disable_regulators;
> }
>
> + data->open_drain = device_property_read_bool(&client->dev, "drive-open-drain");
> + mma8452_set_interrupt_pin_mode(data);
You're not checking the return value here.
> +
> data->ctrl_reg1 = MMA8452_CTRL_ACTIVE |
> (MMA8452_CTRL_DR_DEFAULT << MMA8452_CTRL_DR_SHIFT);
>
> @@ -1683,7 +1705,8 @@ static int mma8452_probe(struct i2c_client *client)
>
> if (client->irq) {
> ret = request_threaded_irq(client->irq, NULL, mma8452_interrupt,
> - IRQF_TRIGGER_LOW | IRQF_ONESHOT,
> + IRQF_TRIGGER_LOW | IRQF_ONESHOT |
> + data->open_drain ? IRQF_SHARED : 0,
Sashiko raises a pretty fun issue: the statement
IRQF_TRIGGER_LOW | IRQF_ONESHOT | data->open_drain ? IRQF_SHARED : 0
is actually evaluated as
(IRQF_TRIGGER_LOW | IRQF_ONESHOT | data->open_drain) ? IRQF_SHARED : 0
Bitwise OR precedes the ternary operator.
You should wrap the data->open_drain ternary in parenthesis.
> client->name, indio_dev);
> if (ret)
> goto buffer_cleanup;
> @@ -1800,6 +1823,10 @@ static int mma8452_runtime_resume(struct device *dev)
> return ret;
> }
>
> + ret = mma8452_set_interrupt_pin_mode(data);
> + if (ret < 0)
> + goto runtime_resume_failed;
You can just have if (ret), as only 0 is successful.
> +
> ret = mma8452_active(data);
> if (ret < 0)
> goto runtime_resume_failed;
>
--
Kind regards
CJD