[PATCH v2 5/9] arm64: dts: imx8ulp-evk: Add gpio-keys node for power button

From: Peng Fan (OSS)

Date: Mon Jul 20 2026 - 10:16:49 EST


From: Peng Fan <peng.fan@xxxxxxx>

Add a gpio-keys node for the power-on button, report it as KEY_POWER to
user space.

Signed-off-by: Peng Fan <peng.fan@xxxxxxx>
---
arch/arm64/boot/dts/freescale/imx8ulp-9x9-evk.dts | 18 ++++++++++++++++++
arch/arm64/boot/dts/freescale/imx8ulp-evk.dts | 19 +++++++++++++++++++
2 files changed, 37 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-9x9-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-9x9-evk.dts
index 5497e3d78136f..af8f0d6087f71 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp-9x9-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8ulp-9x9-evk.dts
@@ -10,6 +10,18 @@
/ {
model = "NXP i.MX8ULP EVK9";
compatible = "fsl,imx8ulp-9x9-evk", "fsl,imx8ulp";
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_keys>;
+
+ button-power-on {
+ label = "PowerOn";
+ gpios = <&gpiof 11 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_POWER>;
+ };
+ };
};

&btcpu {
@@ -43,6 +55,12 @@ MX8ULP_PAD_PTF10__ENET0_1588_CLKIN 0x43
>;
};

+&pinctrl_gpio_keys {
+ fsl,pins = <
+ MX8ULP_PAD_PTF11__PTF11 0x3
+ >;
+};
+
&pinctrl_usb1 {
fsl,pins = <
MX8ULP_PAD_PTE16__USB0_ID 0x10003
diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
index 5dea66c1e7aa0..6a92c5ca9a412 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
@@ -5,6 +5,7 @@

/dts-v1/;

+#include <dt-bindings/input/input.h>
#include "imx8ulp.dtsi"

/ {
@@ -20,6 +21,18 @@ chosen {
stdout-path = &lpuart5;
};

+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_keys>;
+
+ button-power-on {
+ label = "PowerOn";
+ gpios = <&gpiof 31 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_POWER>;
+ };
+ };
+
memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0 0x80000000>;
@@ -323,6 +336,12 @@ MX8ULP_PAD_PTD22__FLEXSPI2_A_DATA4 0x42
>;
};

+ pinctrl_gpio_keys: gpiokeysgrp {
+ fsl,pins = <
+ MX8ULP_PAD_PTF31__PTF31 0x3
+ >;
+ };
+
pinctrl_lpuart5: lpuart5grp {
fsl,pins = <
MX8ULP_PAD_PTF14__LPUART5_TX 0x3

--
2.34.1