RE: [PATCH v2 04/11] wifi: rtw88: fw: fix the reserved page upload on RTL8723BS
From: Ping-Ke Shih
Date: Mon Jul 27 2026 - 03:37:34 EST
luka.gejak@xxxxxxxxx <luka.gejak@xxxxxxxxx> wrote:
[...]
> diff --git a/drivers/net/wireless/realtek/rtw88/fw.c b/drivers/net/wireless/realtek/rtw88/fw.c
> index dd6595b8175e..7c17086cac32 100644
> --- a/drivers/net/wireless/realtek/rtw88/fw.c
> +++ b/drivers/net/wireless/realtek/rtw88/fw.c
> @@ -1477,10 +1477,14 @@ void rtw_add_rsvd_page_sta(struct rtw_dev *rtwdev,
> rtw_add_rsvd_page(rtwdev, rtwvif, RSVD_LPS_PG_INFO, true);
> }
>
> +/* REG_DWBCN1_CTRL bit 20 (SW_BCN_SEL for port 0), relative to byte +2 */
> +#define BIT_OFFSET_DWBCN1_SW_BCN_SEL_PORT0 (20 - 16)
define along its register REG_DWBCN1_CTRL
> +
> int rtw_fw_write_data_rsvd_page(struct rtw_dev *rtwdev, u16 pg_addr,
> u8 *buf, u32 size)
> {
> - u8 bckp[3];
> + const bool is_8723bs_sdio = rtw_is_8723bs(rtwdev);
> + u8 bckp[4];
> u8 val;
> u16 rsvd_pg_head;
> u32 bcn_valid_addr;
> @@ -1510,13 +1514,28 @@ int rtw_fw_write_data_rsvd_page(struct rtw_dev *rtwdev, u16 pg_addr,
> rtw_write8(rtwdev, REG_BCN_CTRL,
> (bckp[2] & ~BIT_EN_BCN_FUNCTION) | BIT_DIS_TSF_UDT);
>
> - if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_PCIE) {
> + /* Clear BIT_EN_BCNQ_DL so the chip does not treat the reserved-page
> + * upload as a real beacon; otherwise BIT_BCN_VALID never asserts. The
> + * vendor rtl8723bs driver does this unconditionally; rtw88 only did it
> + * for PCIe, which left 8723BS SDIO's BCN_VALID handshake failing.
> + */
> + if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_PCIE || is_8723bs_sdio) {
> val = rtw_read8(rtwdev, REG_FWHW_TXQ_CTRL + 2);
> bckp[1] = val;
> val &= ~(BIT_EN_BCNQ_DL >> 16);
> rtw_write8(rtwdev, REG_FWHW_TXQ_CTRL + 2, val);
> }
>
> + /* 8723BS SDIO: point the SW beacon download path at port 0, else
> + * BIT_BCN_VALID is never asserted after the SDIO upload completes.
> + */
Currently, not use networking specific comment style anymore
/*
* first line
* second
*/
> + if (is_8723bs_sdio) {
> + val = rtw_read8(rtwdev, REG_DWBCN1_CTRL + 2);
> + bckp[3] = val;
> + val &= ~BIT(BIT_OFFSET_DWBCN1_SW_BCN_SEL_PORT0);
define along its register REG_DWBCN1_CTRL. Then, here
val &= ~(BIT_DWBCN1_SW_BCN_SEL_PORT0 >> 16);
> + rtw_write8(rtwdev, REG_DWBCN1_CTRL + 2, val);
> + }
> +
> ret = rtw_hci_write_data_rsvd_page(rtwdev, buf, size);
> if (ret) {
> rtw_err(rtwdev, "failed to write data to rsvd page\n");