Re: [PATCH 1/2] dmaengine: dw-axi-dmac: Fix AXI burst length encoding

[Jia Wang]

On 2026-08-28 14:32 -0500, Frank Li wrote:
> On Fri, Aug 28, 2026 at 08:48:26AM +0800, Jia Wang wrote:
> > The snps,axi-max-burst-len property describes the number of beats in an
> > AXI burst, while the ARLEN and AWLEN fields encode that value minus one.
> >
> > The driver keeps axi_rw_burst_len as the actual burst length so that
> > dma_device.max_burst reports the correct value. However, it also programs
> > that unencoded value directly into the hardware fields. A value of 256
> > therefore overflows the 8-bit fields and can cause AXI decode errors.
> >
> > Subtract one only when constructing hardware descriptors, while keeping
> > the actual value for dma_device.max_burst.
> >
> > Fixes: c454d16a7d5a ("dmaengine: dw-axi-dmac: Burst length settings")
> > Signed-off-by: Jia Wang <wangjia@xxxxxxxxxxxxx>
> > ---
> 
> suggest switch to use FIELD_PREP() later
>
> Reviewed-by: Frank Li <Frank.Li@xxxxxxx>
> 

Thanks, I will add a separate cleanup patch in v2 to convert these
register fields to GENMASK() and FIELD_PREP().

Best regards,
Jia Wang

> >  drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
> > index eebed2474210..742e08cfab43 100644
> > --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
> > +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
> > @@ -706,7 +706,7 @@ static int dw_axi_dma_set_hw_desc(struct axi_dma_chan *chan,
> >  	ctlhi = CH_CTL_H_LLI_VALID;
> >
> >  	if (chan->chip->dw->hdata->restrict_axi_burst_len) {
> > -		burst_len = chan->chip->dw->hdata->axi_rw_burst_len;
> > +		burst_len = chan->chip->dw->hdata->axi_rw_burst_len - 1;
> >  		ctlhi |= CH_CTL_H_ARLEN_EN | CH_CTL_H_AWLEN_EN |
> >  			 burst_len << CH_CTL_H_ARLEN_POS |
> >  			 burst_len << CH_CTL_H_AWLEN_POS;
> > @@ -975,7 +975,7 @@ dma_chan_prep_dma_memcpy(struct dma_chan *dchan, dma_addr_t dst_adr,
> >
> >  		reg = CH_CTL_H_LLI_VALID;
> >  		if (chan->chip->dw->hdata->restrict_axi_burst_len) {
> > -			u32 burst_len = chan->chip->dw->hdata->axi_rw_burst_len;
> > +			u32 burst_len = chan->chip->dw->hdata->axi_rw_burst_len - 1;
> >
> >  			reg |= (CH_CTL_H_ARLEN_EN |
> >  				burst_len << CH_CTL_H_ARLEN_POS |
> >
> > --
> > 2.34.1
> >
>