Re: [PATCH v10 09/12] cxl: Restore CXL HDM state after PCI reset

From: Srirangan Madhavan

Date: Wed Sep 02 2026 - 01:19:26 EST


On 8/17/26 12:12 AM, Richard Cheng wrote:
Hi Srirangan,

I don't fully get this part. Once cxl_reset_initiate() succeeds, cxl_reset_execute()
can still return an erro from cxl_reset_wait_done() or from re-enabling CXL
caching.

It that case the above condition will skip PCI/HDM restoration.

However, cxl_pci_target_reset_done() is still called later, and the generic
PCI reset path subsequently calls pci_dev_restore() regardless of the reset-method
return value.

If the reset actually occurred but completion polling timeout, or if the
post-reset cache-enable operation failed, couldn't this restore the IOMMU and
PCI command state while the HDM decoder state remains cleared or otherwise
unknown ?

I am thinking maybe this path need to track whether CXL Reset was succesfully
initiated and then maybe save a disabled PCI state so the generic PCI restore
path can't reactivate the device ?


Thanks, Richard. I've updated the error path.

In v11, the reset path tracks whether CXL Reset was successfully initiated. If completion polling or cache re-enable subsequently fails, it saves a disabled PCI state before releasing the IOMMU reset block. The generic PCI restore therefore cannot restore BME or MSE over unknown HDM state.

Btw, one small question, I'm unclear about the ownership expectation for
FW-programmed EP decoders. If a decoder was programmed and locked by FW, and
CXL Reset clears that state, is the generic PCI layer expected to replay the
cached configuration, or should FW or the owning device driver restore it ?

In particular, cxl_restore_hdm_decoder_state() removes the LOCK bit before
replaying the decoder state. Is it guaranteed that FW-owned locked decoders
retain their committed state across this reset, so this reply path is never
used for them ?

Best regards,
Richard Cheng.

For locked decoders, v11 checks the live state first. If a decoder remains locked and committed after reset, it is left unchanged. If reset clears that state, the generic PCI path replays the cached decoder programming with LOCK cleared so the registers can be restored.
I do not assume that firmware-owned locked state is guaranteed to survive CXL Reset, and the generic PCI reset path does not reassert firmware ownership by setting LOCK again.
--
Regards,
Srirangan