[PATCH v3 0/4] Add Agilex5 support in SVC driver and FPGA configuration and partial reconfiguration support for Agilex5

[Adrian Ng Ho Yin]

This series adds support for Agilex5 in the SVC driver and enables FPGA
configuration and partial reconfiguration on Altera Agilex5 SoC.

On Agilex5 the DDR base address starts at 0x8000_0000, which is
outside the addressable range of the SDM. The SMMU is used to remap
DDR-allocated buffers to an IOVA within the SDM-accessible 0-512MB
window. Agilex5 REV B introduced a hardware SDM address remapper,
but it must be bypassed so no additional offset is applied to the
IOVA, keeping the implementation consistent across all Agilex5
revisions.

Patch 1 adds the fpga-mgr child node and fpga-region to the Agilex5 DTSI.
The SMMU is already enabled upstream.

Patch 2 reports unmatched frees in stratix10_svc_free_memory() with
dev_warn() and cleans up related coding style in svc_pa_to_va(). The
list-head corruption from list_del(&svc_data_mem) was already fixed by
commit 9119ceb76e98 ("firmware: stratix10-svc: fix memory leaks and list
corruption bugs").

Patch 3 adds all data-structure fields, macros, includes, helper function,
and allocation/free paths required for the DMA coherent mode. This covers
both the foundational types (dma_addr, use_dma_mem, dma_addr_offset,
SVC_SDM_DMA_ADDR_BITS/OFFSET) and the functional DMA allocation/free code,
keeping the structural and functional changes together so each intermediate
commit is bisect-safe.

Patch 4 adds INTEL_SIP_SMC_SDM_REMAPPER_CONFIG and integrates the Agilex5
path into probe: enforces SMMU presence for intel,agilex5-svc, issues the
remapper-bypass SMC, selects the DMA path via stratix10_svc_pdata.use_dma_mem,
initialises the controller fields, registers a devm cleanup action for
leaked buffers, and guards the error path against a NULL genpool.

---
changelog:
v2 -> v3:
- Squash former patch 2 (SMC remapper defines) into the probe enablement
  patch so the defines land with their first usage.
- Rebase on socfpga_firmware_for_v7.4.
- Drop SMMU status="disabled" removal from the DTS patch (already upstream
  in 10cf797f3f8a).
- Drop the list_del(&svc_data_mem) fix already present in 9119ceb76e98;
  keep the unmatched-free warning and style cleanup.
- Adapt of_device_id.data usage to extend stratix10_svc_pdata (shared with
  needs_psci_cpu_off) instead of casting BIT flags into .data.
- Keep kzalloc_obj()/kfree() lifetime for pmem on both gen_pool and DMA
  paths after 9119ceb76e98.

v1 -> v2:
- split original patch into smaller patches for easier review and backporting.
- Fixed the Fixes: tag in patch 3 referencing 5a0793ac66ac
- Replaced of_device_is_compatible() with of_device_id.data + of_device_get_match_data()
- Various commit message improvements
---

Adrian Ng Ho Yin (4):
  arm64: dts: socfpga: agilex5: add FPGA manager and region nodes
  firmware: stratix10-svc: warn on unmatched free in
    stratix10_svc_free_memory
  firmware: stratix10-svc: add DMA coherent memory allocation for
    SMMU-enabled platforms
  firmware: stratix10-svc: enable Agilex5 SMMU support in probe

 .../arm64/boot/dts/intel/socfpga_agilex5.dtsi |  11 +
 drivers/firmware/stratix10-svc.c              | 250 +++++++++++++++++---
 include/linux/firmware/intel/stratix10-smc.h  |  23 ++
 3 files changed, 239 insertions(+), 45 deletions(-)

-- 
2.49.GIT