Re: [PATCH v5] irqchip/gic-v3: Add Altera SoCFPGA Agilex5 GIC600 DMA32 erratum workaround

[Marc Zyngier]

On Mon, 07 Sep 2026 09:22:59 +0100,
Adrian Ng Ho Yin <adrian.ho.yin.ng@xxxxxxxxxx> wrote:
> 
> Agilex5 integrates GIC600 with an ACE-lite interface limited to a 32-bit
> address bus, so the ITS can only access the first 4 GB of physical address
> space. Register intel,socfpga-agilex5 on the existing
> dma_32bit_impaired_platforms list so ITS allocations use GFP_DMA32.
> 
> The workaround is guarded by ALTERA_ERRATUM_AGILEX5_2_1_23, which is
> selected by ARCH_INTEL_SOCFPGA as all Agilex5 devices are affected.
> 
> This limitation is documented as Agilex 5 ES Device Errata 2.1.23 (825514).
> 
> Signed-off-by: Adrian Ng Ho Yin <adrian.ho.yin.ng@xxxxxxxxxx>

Reviewed-by: Marc Zyngier <maz@xxxxxxxxxx>

	M.

-- 
Without deviation from the norm, progress is not possible.