Re: [PATCH net 3/3] net: dsa: lantiq_gswip: fix GSWIP_MDIO_PHY_FCONTX_EN value

[Jan Havran]

V Tue, Sep 08, 2026 at 05:43:22PM -0700, Jakub Kicinski napsal(a):
> On Mon, 7 Sep 2026 18:28:32 +0200 Maxime Chevallier wrote:
> > On 9/7/26 15:48, Jan Havran (Advantech Czech) wrote:
> > > Per the GSW145 data sheet, the FCONTX (bits 8:7) and FCONRX (bits 6:5)
> > > flow-control fields of the PHY_ADDR_n register both encode 00 = AUTO,
> > > 01 = EN, 10 = reserved, 11 = DIS. GSWIP_MDIO_PHY_FCONTX_EN was 0x0100,
> > > i.e. field value 10 (the reserved encoding), instead of 0x0080 (01 = EN);
> > > FCONRX_EN is already 0x0020 (01). Enabling tx flow control therefore wrote
> > > the reserved value.
> > > 
> > > Set FCONTX_EN to 0x0080. The register is shared by all supported parts.
> > > 
> > > Fixes: 14fceff4771e ("net: dsa: Add Lantiq / Intel DSA driver for vrx200")
> > > Signed-off-by: Jan Havran (Advantech Czech) <havran.jan@xxxxxxxx>  
> > 
> > Reviewed-by: Maxime Chevallier <maxime.chevallier@xxxxxxxxxxx>
> 
> Other than this last patch the series reads like net-next material 
> to me TBH. New board enablement. Is that fair?
> 
> No need to repost either way.
> 
> And thanks for quick reviews!

Hi Jakub,
it makes sense to me. If there is no other board using different speed than the one
defined by the straps and also there is no other board running it at 2.5G speed,
then yes, it is new board enablement.

Sorry for the trouble. I had not thought about looking at it from this perspective.

Regards,
Jan