RE: [PATCH v3 0/9] Add Aspeed AST2700 SDRAM EDAC support

[Ryan Chen]

> Subject: Re: [PATCH v3 0/9] Add Aspeed AST2700 SDRAM EDAC support
> 
> On Tue, Sep 29, 2026 at 03:26:42AM +0000, Ryan Chen wrote:
> > > Subject: Re: [PATCH v3 0/9] Add Aspeed AST2700 SDRAM EDAC support
> > >
> > > On Wed, Sep 16, 2026 at 01:30:37PM +0800, Ryan Chen wrote:
> > > > Add ECC error reporting for the Aspeed AST2700 SoC to the existing
> > > > aspeed_edac driver.
> > > >
> > > > The AST2700 memory controller keeps the same overall EDAC
> > > > programming model as the earlier Aspeed BMC SoCs, but uses a
> > > > different register layout, a split interrupt status/clear/mask scheme and
> DDR4/DDR5 memory.
> > > > Rather than fork the driver, the existing code is first tidied and
> > > > generalised, then the AST2700 is added as one more per-SoC variant.
> > > >
> > > > Patches 2-5 are bug fixes and cleanups to the existing driver.
> > >
> > > You always put the bug fixes first in a set. So it should be 1-4
> > > bugfixes, rest new features.
> > >
> > > --
> > Thanks your review.
> 
> Not done yet but you can send a new version if you feel like it. For it, you could
> also pick up Stefan's patch and merge it with your last one so that the driver
> doesn't become orphan.


Will do. 9/9 becomes one patch that drops Stefan's M: line and adds
mine as R:, carrying his Signed-off-by and a Link: to

  https://lore.kernel.org/r/20260920225846.4039017-1-sschaeck@xxxxxxxxx

That leaves the entry with a reviewer and S: Supported, the same shape
as EDAC-FSL_DDR.

> 
> Also, think hard before you mark fixes as CC:stable because stable fixes trigger
> a lot of work downstream: stable trees, distros etc. So consult:
> 
> Documentation/process/stable-kernel-rules.rst
> 
Thanks the instruction.

The grain one is a single WARN_ON_ONCE and the error is still reported
afterwards, and the use-after-free needs rmmod to race an ECC interrupt,
which is the kind of theoretical race the rules exclude. I'll drop both
Cc: stable tags and keep the Fixes: ones.

The reordering for v4:

  1  EDAC/aspeed: Set the DIMM grain
  2  EDAC/aspeed: Free the interrupt before the mem_ctl_info on remove
  3  EDAC/aspeed: Clean up whitespace and include ordering
  4  EDAC/aspeed: Free the mem_ctl_info unconditionally on remove
  5  dt-bindings: edac: aspeed: Add AST2700 SDRAM EDAC
  6  EDAC/aspeed: Replace regmap with direct register access
  7  EDAC/aspeed: Abstract SoC differences behind chip data
  8  EDAC/aspeed: Add AST2700 support
  9  MAINTAINERS: Add a reviewer for the Aspeed EDAC driver

Ryan