Re: [PATCH 2/2] clk: qcom: mmcc-sdm660: set num_parents on mdss_axi_clk

[Konrad Dybcio]

On 9/28/26 7:41 PM, Fabricio Akio via B4 Relay wrote:
> From: Fabricio Akio <fabricioakio@xxxxxxxxx>
> 
> mdss_axi_clk names axi_clk_src in parent_hws but leaves num_parents at
> zero, so the array is never read and the branch registers as a root
> clock -- no rate of its own, and no reference on its parent:
> 
>   axi_clk_src   en=0 rate=384000000
>   mdss_axi_clk  en=1 rate=0
> 
> It is the only branch in this driver missing the field.
> 
> Fixes: 5db3ae8b33de ("clk: qcom: Add SDM660 Multimedia Clock Controller (MMCC) driver")
> Signed-off-by: Fabricio Akio <fabricioakio@xxxxxxxxx>
> ---

Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxxxx>

Konrad