[PATCH 3/3] arm64: dts: s32g: map SIUL2 EIRQ register window in pinctrl node
From: Khristine Andreea Barbulescu
Date: Thu Oct 08 2026 - 03:20:13 EST
Extend the SIUL2_1 pinctrl reg list to cover the EIRQ input-mux IMCR
window so the EIRQ source-select (SSS) registers used to route a pad
to an external interrupt line are reachable by the driver.
This adds the IMCR398..IMCR429 region (<0x44011078 0x80>), which holds
the EIRQ0..EIRQ31 input multiplexers. Without it the pad-to-EIRQ
routing write falls in an unmapped gap and the interrupt never fires.
Signed-off-by: Khristine Andreea Barbulescu <khristineandreea.barbulescu@xxxxxxxxxxx>
---
arch/arm64/boot/dts/freescale/s32g2.dtsi | 2 ++
arch/arm64/boot/dts/freescale/s32g3.dtsi | 2 ++
2 files changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
index 996494e34593..53213057120e 100644
--- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
@@ -139,6 +139,8 @@ pinctrl: pinctrl@4009c240 {
<0x4009ca40 0x150>,
/* IMCR119-IMCR397 registers on siul2_1 */
<0x44010c1c 0x45c>,
+ /* IMCR398-IMCR429 (EIRQ input mux) on siul2_1 */
+ <0x44011078 0x80>,
/* IMCR430-IMCR495 registers on siul2_1 */
<0x440110f8 0x108>,
/* PGPDO registers on siul2_0 */
diff --git a/arch/arm64/boot/dts/freescale/s32g3.dtsi b/arch/arm64/boot/dts/freescale/s32g3.dtsi
index 31f7aad00b76..fda827fd3eee 100644
--- a/arch/arm64/boot/dts/freescale/s32g3.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g3.dtsi
@@ -197,6 +197,8 @@ pinctrl: pinctrl@4009c240 {
<0x4009ca40 0x150>,
/* IMCR119-IMCR397 registers on siul2_1 */
<0x44010c1c 0x45c>,
+ /* IMCR398-IMCR429 (EIRQ input mux) on siul2_1 */
+ <0x44011078 0x80>,
/* IMCR430-IMCR495 registers on siul2_1 */
<0x440110f8 0x108>,
/* PGPDO registers on siul2_0 */
--
2.34.1